33874 datasheet(19/38 Pages) FREESCALE

19 / 38 page

Analog Integrated Circuit Device Data

Freescale Semiconductor

33874

FUNCTIONAL DEVICE OPERATION

PROTECTION AND DIAGNOSTIC FEATURES

resistance limiting the internal clamp current according to the

specification.

The Watchdog timeout is a multiple of an internal oscillator

and is specified in the Table 15, page 24. As long as the WD

bit (D15) of an incoming SPI message is toggled within the

minimum watchdog timeout period (WDTO), based on the

programmed value of the WDR, the device will operate

normally. If an internal watchdog timeout occurs before the

WD bit, the device will revert to a Fail-safe mode until the

device is reinitialized.

During the Fail-safe Mode, the outputs will be ON or OFF

depending upon the resistor RFS connected to the FSI pin,

regardless of the state of the various direct inputs and modes

(Table 6).

In the Fail-safe Mode, the SPI register content is retained

except for over-current high and low detection levels, timing

and latched over-temperature which are reset to their default

value (SOCL, SOCH, and OCTL and OT_latch_[0:3] bits).

Then the watchdog, over-voltage, over-temperature, and

over-current circuitry (with default value) are fully operational.

The Fail-safe Mode can be detected by monitoring the

WDTO bit D2 of the WD register. This bit is logic [1] when the

device is in Fail-safe Mode. The device can be brought out of

the Fail-safe Mode by transitioning the WAKE and RST pins

from logic [1] to logic [0] or forcing the FSI pin to logic [0].

Table 5 summarizes the various methods for resetting the

device from the latched Fail-safe Mode.

If the FSI pin is tied to GND, the Watchdog fail-safe

operation is disabled.

LOSS OF VDD

If the external 5.0 V supply is not within specification, or

even disconnected, all register content is reset. The outputs

can still be driven by the direct inputs IN0:IN3. The 33874

uses the battery input to power the output MOSFET-related

current sense circuitry and any other internal logic providing

fail-safe device operation with no VDD supplied. In this state,

the watchdog, under-voltage, over-voltage, over-temperature

(latched) and over-current circuitry are fully operational with

default values.

FAULT MODE

This 33874 indicates the faults below as they occur by

driving the FS pin to logic [0]:

• Over-temperature fault

• Over-voltage and under-voltage fault

• Open load fault

• Over-current fault (high and low)

The FS pin will automatically return to logic [1] when the

fault condition is removed, except for overcurrent,

overtemperature (in case of latching configuration) and in

some cases of undervoltage.

The FS pin reports all faults. For latched faults, this pin is

reset by a new Switch ON command (via the SPI or direct

input IN).

Fault information is retained in the fault register and is

available (and reset) via the SO pin during the first valid SPI

communication (refer to Table 17, page 26).

PROTECTION AND DIAGNOSTIC FEATURES

OVER-TEMPERATURE FAULT (LATCHING OR

NON-LATCHING)

The 33874 incorporates over-temperature detection and

shutdown circuitry for each output structure.

The over-temperature is latched per default and can be

unlatched through SPI with OT_latch_[0:3] bits.

An over-temperature fault condition results in turning OFF

the corresponding output. To remove the fault and be able to

turn ON again the outputs, the failure must be removed and:

• in Normal Mode: the corresponding output must be

commanded OFF and ON again in case of over-

temperature latched (OT_latch bit = 0).

• in Normal Mode: the corresponding output turns ON

automatically if the temperature is below TSD-TSD(HYS) in

case of unlatched over-temperature (OT_latch bit = 1).

• in Fail-safe Mode: the FSI input must be grounded and

then set to its nominal voltage to switch ON the outputs.

The over-temperature fault (one for each output) is

reported by SPI. If the over-temperature is latched, the SPI

reports OTF_s = [1] and OCLF_s = [1]. In case of non-

latched, OTF_s = [1] only is reported.

The fault bits will be cleared in the status register after either

a valid SPI read command or a power on reset of the device.

OVERCURRENT FAULT (LATCHING)

The 33874 has eight programmable over-current low

detection levels (IOCL) and two programmable over-current

high detection levels (IOCH) for maximum device protection.

The two selectable, simultaneously active over-current

Table 6. Output State During Fail-safe Mode

RFS (k

Ω)

High Side State

0 (shorted to ground)

Fail-safe Mode Disabled

6.0

All HS OFF

HS0 ON

HS1:HS3 OFF

30 (open)

HS0 and HS2 ON

HS1 and HS3 OFF

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