21. Reset circuit — Pin 68: RES

When power is first applied, this pin should be briefly set low and then set high. This will set the muting to –

∞ dB

and stop the disc motor.

22. Other pins — Pin 2:TAI, pin 80: TEST1, pin 12: TEST2, pin 26: TEST3, pin 31: TEST4, pin 74: TEST5, pin 69:

TST11, pin 60: TEST6

These pins are used for testing the IC’s internal circuits. The TAI and TEST1 to TEST5 pins must be connected to

ground (0 V). TST11 is an output pin, and should be left open in normal applications. TST11 normally outputs a low

level. TEST6 is an output pin, and should be left open in normal applications. TEST6 outputs a low level after an

FSX, TEST6, or EFLG LO instruction ($0A) has been applied.

23. Circuit Block Operating Descriptions

• RAM address control

The LC78628E incorporates an 8-bit

× 2K-word RAM on chip. This RAM has an EFM demodulated data jitter

handling capacity of ±4 frames for bufer memory implemented using address control. The LC78628E continuously

checks the remaining buffer capacity and controls the data write address to fall in the center of the buffer capacity by

making fine adjustments to the frequency divisor in the PCK side of the CLV servo circuit. If the ±4 frame buffer

capacity is exceeded, the LC78628E forcibly sets the write address to the ±0 position. However, since the errors that

occur due to this operation cannot be handled with error flag processing, the IC applies muting to the output for a 128

frame period.

Setting the RES pin low directly sets the LC78628E to the settings enclosed in boxes in the table.

No. 6329-32/40

LC78628E

CLV servo related

START

STOP

BRAKE

CLV

Muting control

0 dB

–12 dB

–

∞

Subcode Q address condition

Address 1

Address Free

Track jump mode

Previous

New

Track count mode

Previous

New

Digital attenuator

DATA0

DATA$00 to $FF

OSC

ON

OFF

Playback speed

Normal speed

Double-speed

+

RES

A12834

+5V

68

Position

Divisor or Handling

–4 or lower

Forcibly moves to ±0

–3

589

–2

589

Advancing divisors

–1

589

±0

588

Standard divisor

+1

587

+2

587

Decreasing divisors

+3

587

+4 or greater

Forcibly moves to ±0