| Electronic Components Datasheet Search |
|
LC78628 Datasheet(PDF) 39 Page - Sanyo Semicon Device |
|
|
|||||||||||||||||||||||||||||
LC78628 Datasheet(HTML) 39 Page - Sanyo Semicon Device |
|
39 / 40 page ![]() Notes on Thermal Design The failure rate of semiconductor devices is significantly accelerated by increases in ambient temperature and power dissipation. To assure high reliability, possible variations in the ambient conditions must be considered and adequate margins provided in the thermal design. Notes on Printed Circuit Board Pattern Design • Separate VDD and ground lines should be used for each system to reduce the influence of shared impedances. • The VDD and ground lines should be made as short and wide as possible, and their high-frequency impedance should be made as low as possible. Ideally, decoupling capacitors (0.01 to 1 µF) should be inserted between each VDD and ground. These capacitors must be placed as close as possible to the power supply pins of the IC. Also, it is appropriate to insert capacitor of about 100 to 220 µF between each VDD and ground as low-frequency filters. However, note that if these capacitors are too large, latch-up may result. * In the servo system, the reference voltage VREF line should be handled in the same way as the driver VDD and ground lines. The driver ground lines should be made particularly wide. The recommended driver pattern, which takes heat dissipation directly under the device into account, must be used. * If a current output type pickup is used, the light sensor element connector and the ASP RF input must be located as close together as possible. If a voltage output type pickup is used, the current-voltage conversion resistor located at the ASP input should be located near the ASP RF input. • The EFM signal line should be made as short as possible, and either kept away from other signal lines or a VSS or VDD shield line should be placed between this line and the adjacent signal line. The slice level controller output (EFMO) and the ASP clock output (4.2M) can easily cause interference in the EFM signal line. Therefore the resistor connected to the output pin should be placed as close to the pin as possible. Also note that the influence of spurious radiation is increased when this resistor is small, and that the output level requires care when the resistor is larger. The 4.2M output must be designed while taking the ASP input level into account (design center: 1 Vp-p). • Noise occurring in the microcontroller interface may result in incorrect operation. Although this will depend on the application itself, the interface lines should be made as short as possible and inductances and capacitances minimized. However, be careful that crosstalk does not become a problem. If the interface lines must be long, or external noise is a problem, it may be effective to insert noise reducers. These filters must be designed with the interface timing taken into consideration. Applying the command noise reduction command ($EF) to the LC78628E can also be effective. • Cover the area around the crystal oscillator circuit with a ground pattern layer. Notes on Software Design • Software designers must follow the instructions in the device documentation concerning recommendations and forbidden aspects when designing software for this device. • If the digital output is used, apply a UBIT OFF ($41) command to the LC78628E at initialization. A UBIT ON ($40) command should only be issued during playback to prevent DIR unlock and to prevent incorrect subcode operation. • At initialization, after releasing the LC78628E reset state, and after issuing an OSC ON command to the LC78628E, issue a 2-byte command reset ($FF) to the ASP (an LA9230M Series or LA9240M Series IC) and set up the ASP command register. • If the subcode Q data cannot be received for over a certain period during CD playback, it may be due to noise entering the microcontroller interface. Before switching to stop processing, issue an $FF command and then try to receive the subcode Q data again. • Since the ASP (an LA9230M Series or LA9240M Series IC) uses the LC78628E 4.2M output as the master clock, an additional 30 ms setup time in addition to the oscillator stabilization time is required at initialization, after clearing the LC78628E reset state, and after issuing an OSC ON command to the LC78628E. Note that this 30 ms setup time is also required after issuing an ASP RESET ($00) command to the ASP. • Since the command timing for the ASP (an LA9230M Series or LA9240M Series IC) is slower than that for the LC78628E, be sure to refer to the ASP documentation when designing the software. No. 6329-39/40 LC78628E |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |