PIC12F752 datasheet(153/204 Pages) MICROCHIP

153 / 204 page

 2011 Microchip Technology Inc.

Preliminary

DS41576A-page 153

PIC12F752/HV752

FIGURE 17-10:

WAKE-UP FROM SLEEP THROUGH INTERRUPT

17.8

Code Protection

the

code

protection

bit(s)

have

not

been

programmed, the on-chip program memory can be

read out using ICSP™ for verification purposes.

17.9

ID Locations

Four memory locations (2000h-2003h) are designated

as ID locations where the user can store checksum or

other code identification numbers. These locations are

not accessible during normal execution but are

readable and writable during Program/Verify mode.

Only the Least Significant 7 bits of the ID locations are

reported when using MPLAB® IDE.

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

CLKIN

CLKOUT

INT pin

INTF flag

(INTCON reg.)

GIE bit

(INTCON reg.)

Instruction Flow

Instruction

Fetched

Instruction

Executed

PC + 1

PC + 2

Inst(PC) = Sleep

Inst(PC – 1)

Inst(PC + 1)

Sleep

Processor in

Sleep

Interrupt Latency(3)

Inst(PC + 2)

Inst(PC + 1)

Inst(0004h)

Inst(0005h)

Inst(0004h)

Dummy Cycle

PC + 2

0004h

0005h

Dummy Cycle

TIOSCST

PC + 2

Note

HFINTOSC Oscillator mode assumed.

GIE = ‘1’ assumed. In this case after wake-up, the processor jumps to 0004h. If GIE = ‘0’, execution will continue in-line.

Note:

The entire Flash program memory will be

erased when the code protection is turned

off.

See

the

“Program

Memory

Specification”

(DS41561)

for

information.

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