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SM5M2 Datasheet(PDF) 24 Page - Sharp Corporation

Part # SM5M2
Description  4-Bit Single-Chip Microcomputer(LCD Driver)
PDF  28 Pages
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Manufacturer  SHARP [Sharp Corporation]
Direct Link  http://sharp-world.com/
Logo SHARP - Sharp Corporation

SM5M2 Datasheet(HTML) 24 Page - Sharp Corporation

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SM5M2
- 24 -
VDD
RF1
SM5M2
R1
R1 = R2
R2
VOA
VDD
• Blank display
There are two way to blank the entire display to
match the purpose.
(a) Blanking the display for a short time.
Set bit 0 of the RF register to "1" : Display
Set bit 0 of the RF register to "0" : Blank state
(b) Blanking the display for a long period mainy to
reduce supply current.
Set bit 0 and 1 of the RF register to "1" :
Display
Set bit 0 and 1 of the RF register to "0" :
Blank state
When bit 1 of the RF register is set "0", the voltage
(VDD) applied to the bleeder resistors is turned off
and common outputs and segment outputs are
dropped to GND level so that the display blanks.
By cutting off the bleeder supply, the current
consumption can be greatly reduced. However,
when the display is blanked using method (b), the
response speed of the LCD returning to the display
state drops slightly. The RF register is in the blank
state after initialization (reset state) from hardware
reset.
Fig. 17
Booster Circuit
SM5M2
VDD
VOA
Fig. 18
Externally Connected Capacitor Circuit
• VOA pin
Bleeder resistors are built-in to drive the LCD at 1/2
bias. The bieeder resistors have the configuration
shown in Fig. 17. When bit 1 of the RF registor is
set and VDD is 3 V, VOA output 1.5 V.
Normally, the VOA pin is used in its open state. To
drive an LCD with a large display area, the leading
edge of the LCD drive waveform can be improved
by connecting capacitor across the VOA pin and
VDD. The same effect can be obtained by
connecting capacitor across the VOA pin and GND.
When bit 1 of the RF register is set "0", VOA drop
to GND level to reduce power consumption. At the
same time, the H0-H3 and S0-S33 pin are GND
level.
• Booster circuit
It is necessary to apply external capacitors
between VDD pin and VOA pin. (see Fig. 18)



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