SM5M2 datasheet(25/28 Pages) SHARP

25 / 28 page

SM5M2

- 25 -

INSTRUCTION SET

Definition of Symbols

The following symbols are used in descriptions for

the instructions.

: Contents

RAM

the

address

specified by the B register

←

: Transfer direction

∪

: Logical OR

∩

: Logical AND

⊕

: Logical XOR

: ith bit of the ACC

Push

: Content of the PC are decremented to

the stack register.

Pop

: The

decremented

contents

are

transferred back to the PC.

: Pj register ( j = 3, 2, 1, 0)

: Rj register ( j = F, E, D)

ROM ( ) : ROM contents for address within ( )

: Carry of ALU (different from the C flag)

• Each bit of a register can be represented.

For example, the ith bit of X register and R(0)

1, 2, 3, ...)

• Increment and decrement denote the binary

addition of 1H and FH, respectively.

• To skip a certain instruction means that the

instruction is ignored and that no operation is

performed until the execution transfers to the next

instruction. In other words, the instruction is

regarded as a NOP instruction. Therefore, one

cycle is required to skip a one-word instruction

and two cycles are required to skip a two-word

instruction.

SM5M2 Datasheet(PDF) 25 Page - Sharp Corporation

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