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LTC3675

3675fa

On start-up, all PGOOD outputs are unmasked and a power-

on reset will cause RSTB to be pulled low. Once all enabled

regulators have their output PGOOD for 200ms typical

(CT = 0.01μF) the RSTB output goes Hi-Z.

By masking a PGOOD signal, the RSTB or IRQB pin will

remain Hi-Z even though the output voltage of a regulator

may be below its PGOOD threshold. However, when the

status register is read back, the true condition of PGOOD

is reported.

UNDERVOLTAGE AND OVERTEMPERATURE

FUNCTIONALITY

The undervoltage (UV) circuit monitors the input supply

voltage and shuts down all enabled regulators if the input

voltage falls below 2.45V. The LTC3675 also provides a

user with an undervoltage warning, which indicates to the

user that the input supply voltage is approaching the UV

threshold. The undervoltage warning threshold is user

programmable as shown in Table 2.

Table 2. UV Warning Thresholds

UV[2], UV[1], UV[0]

FALLING VIN WARNING THRESHOLD

000 (Default)

2.7V

001

2.8V

010

2.9V

011

3.0V

100

3.1V

101

3.2V

110

3.3V

111

3.4V

To prevent thermal damage to the LTC3675 and its sur-

rounding components, the LTC3675 incorporates an

overtemperature (OT) function. When the LTC3675 die

temperature reaches 150°C all enabled regulators are shut

down and remain in shutdown until the die temperature

falls to 135°C. The LTC3675 also has an overtemperature

warning function which warns a user that the die tempera-

ture is approaching the OT threshold which allows the user

to take any corrective action. The OT warning threshold is

user programmable as shown in Table 3.

Table 3. OT Warning Thresholds

OT[1], OT[0]

OT WARNING THRESHOLD

00 (Default)

10° Below OT

20° Below OT

30° Below OT

40° Below OT

A UV or OT warning is reported to the user when the IRQB

pin is in its high impedance state. The UV and OT warning

ﬂags are not maskable by the user.

RESET_ALL Functionality: The RESET_ALL bit shuts down

all enabled regulators (enabled either via its enable pin or

I2C) for 1 second. All command registers are cleared and

put in their default state.

OPERATION

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