EDJ8232B5MB datasheet(64/142 Pages) ELPIDA

64 / 142 page

EDJ8232B5MB

Data Sheet E1825E30 (Ver. 3.0)

Self-Refresh Command [SELF]

The self-refresh command can be used to retain data in the DDR3, even if the rest of the system is powered down.

When in the self-refresh mode, the DDR3 retains data without external clocking.

The self-refresh command is

initiated like an auto-refresh command except CKE is disabled (low).

The DLL is automatically disabled upon

entering self-refresh and is automatically enabled and reset upon exiting self-refresh. The active termination is also

disabled upon entering self-refresh and enabled upon exiting self-refresh. (512 clock cycles must then occur before

a read command can be issued). Input signals except CKE are "Don't Care" during self-refresh. The procedure for

exiting self-refresh requires a sequence of commands. First, CK and /CK must be stable prior to CKE going back

high. Once CKE is high, the DDR3 must have NOP commands issued for tXSDLL because time is required for the

completion of any internal refresh in progress. A simple algorithm for meeting both refresh, DLL requirements and

out-put calibration is to apply NOPs for 512 clock cycles before applying any other command to allow the DLL to lock

and the output drivers to recalibrate.

ZQ calibration Command [ZQCL, ZQCS]

ZQ calibration command (short or long) is used to calibrate DRAM RON and ODT values over PVT.

ZQ Calibration Long (ZQCL) command is used to perform the initial calibration during power-up initialization

sequence.

ZQ Calibration Short (ZQCS) command is used to perform periodic calibrations to account for VT variations.

All banks must be precharged and tRP met before ZQCL or ZQCS commands are issued by the controller.

ZQ calibration commands can also be issued in parallel to DLL lock time when coming out of self-refresh.

EDJ8232B5MB Datasheet(PDF) 64 Page - Elpida Memory