EDJ8232B5MB datasheet(77/142 Pages) ELPIDA

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EDJ8232B5MB

Data Sheet E1825E30 (Ver. 3.0)

DLL “off” to DLL “on” Procedure

To Switch from DLL “off” to DLL “on” (with required frequency change) during Self-Refresh:

1. Starting from Idle state (all banks pre-charged, all timings fulfilled and DRAMs On-die Termination resistors (RTT)

must be in high impedance state before Self-Refresh mode is entered.)

2. Enter Self-refresh Mode, wait until tCKSRE satisfied.

3. Change frequency, in guidance with Input Clock Frequency Change during Precharge Power-Down section.

4. Wait until a stable clock is available for at least (tCKSRX) at DRAM inputs.

5. Starting with the self-refresh exit command, CKE must continuously be registered high until all tDLLK timing from

subsequent DLL Reset command is satisfied.

In addition, if any ODT features were enabled in the mode

registers when self-refresh mode was entered, the ODT signal must continuously be registered low until tDLLK

timings from subsequent DLL Reset command is satisfied.

If both ODT features are disabled in the mode

registers when Self-refresh mode was entered, ODT signal can be registered low or high.

6. Wait tXS, then set MR1 bit A0 to “0” to enable the DLL.

7. Wait tMRD, then set MR0 bit A8 to “1” to start DLL Reset.

8. Wait tMRD, and then set mode registers with appropriate values (especially an update of CL, CWL and WR may

be necessary. After tMOD is satisfied from any proceeding MRS command, a ZQCL command may also be

issued during or after tDLLK.)

9. Wait for tMOD, and then DRAM is ready for next command (remember to wait tDLLK after DLL Reset before

applying command requiring a locked DLL). In addition, wait also for tZQoper in case a ZQCL command was

issued.

Command

CKE

ODT

/CK

Tc Tc+1Tc+2

Tf+2

Tf+1

Valid

MRS

SRX

NOP

SRE

Change Frequency

tCKESR

ODTLoff + 1x tCK

tCKSRE

tCKSRX

tDLLK

tXS

tMRD

DLL Switch Sequence from DLL-Off to DLL-On

EDJ8232B5MB Datasheet(PDF) 77 Page - Elpida Memory

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