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DLPC100ZCT Datasheet(PDF) 13 Page - Texas Instruments |
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DLPC100ZCT Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 25 page ![]() DLPC100 www.ti.com DLPS019B – DECEMBER 2009 – REVISED DECEMBER 2010 I 2C INTERFACE TIMING REQUIREMENTS PARAMETER MIN MAX UNIT fscl I2C clock frequency 0 400 kHz tsch I2C clock high time 1 ms tscl I2C clock low time 1 ms tsp I2C spike time 20 ns tsds I2C serial-data setup time 100 ns tsdh I2C serial-data hold time 100 ns ticr I2C input rise time 20 300 ns tocf I2C output fall time 50 pF 30 200 ns tbuf I2C bus free time between Stop and Start conditions 1.3 ms tsts I2C Start or repeated Start condition setup 1 ms tsth I2C Start or repeated Start condition hold 1 ms tsph I2C Stop condition setup 1 ms Valid-data time SCL low to SDA output valid 1 ms tvd Valid-data time of ACK condition ACK signal from SCL low to SDA (out) low 1 ms tsph I2C bus capacitive load 0 100 pF Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Link(s): DLPC100 |
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