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WM8224 Datasheet(PDF) 5 Page - Wolfson Microelectronics plc

Part # WM8224
Description  60MSPS 3-Channel AFE with Multiple Device Operation and Programmable Automatic Black Level Calibration
PDF  50 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8224 Datasheet(HTML) 5 Page - Wolfson Microelectronics plc

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WM8224
Production Data
w
PD, Rev 4.1, June 2012
5
PIN DESCRIPTION
PIN
NAME
TYPE
DESCRIPTION
1
RSMP
Digital input
Reset sample pulse (when CDS=1) or clamp control.
2
MCLK
Digital input
Master (ADC) clock. This clock determines the ADC conversion rate.
3
DGND
Supply
Digital ground.
4
SEN
Digital input
Enables the serial interface when high.
5
DVDD
Supply
Digital supply for logic, clock generator and digital input/output pads.
6
SDI
Digital input
Serial interface data input.
7
SCK
Digital input
Serial interface clock.
Digital output data bus. ADC output data (d15:d0) is available in a variety of output
formats.
8
OP[0]
Digital output
d0 (LSB)
9
OP[1]
Digital output
d1
10
OP[2]
Digital output
d2
11
OP[3]
Digital output
d3
12
OP[4]
Digital output
d4
13
OP[5]
Digital output
d5
14
OP[6]
Digital output
d6
15
OP[7]
Digital output
d7
16
OP[8]
Digital output
d8
17
OP[9]
Digital output
d9
18
OP[10]
Digital output
d10
19
OP[11]/SDO
Digital output
d11 (MSB)
Alternatively, pin OP[11]/SDO may be used to output register read-back data. See
Serial Interface description in Device Description section for further details.
20
AVDD
Supply
Analogue supply. This must be operated at the same potential as DVDD.
21
AGND1
Supply
Analogue ground.
22
VRB
Analogue output
Lower reference voltage.
This pin must be connected to AGND via a decoupling capacitor.
23
VRT
Analogue output
Upper reference voltage.
This pin must be connected to AGND via a decoupling capacitor.
24
VRX
Analogue output
Input return bias voltage.
This pin must be connected to AGND via a decoupling capacitor.
25
VRLC/VBIAS
Analogue I/O
Selectable analogue output voltage for RLC or single-ended bias reference.
This pin would typically be connected to AGND via a decoupling capacitor.
VRLC can be externally driven if programmed Hi-Z.
26
BINP
Analogue input
Blue channel input video.
27
GINP
Analogue input
Green channel input video.
28
RINP
Analogue input
Red channel input video.
29
AGND2
Supply
Analogue ground.
30
DSLCT
Digital Tristate
Input
Sets 2-bit device ID for daisy chain operation:
0 = Device ID is 00
1 = Device ID is 01
Z = Device ID is 10
31
OEB
Digital input
Output Hi-Z control. All digital outputs set to high-impedance state when input pin
OEB=1, if AUTOZ=0.
Note that readback function will override high-impedance on OP11
This pin has an internal 100k
 pull-down resistor to AGND.
32
VSMP
Digital input
Video sample pulse.



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