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AD9250 Datasheet(PDF) 32 Page - Analog Devices

Part # AD9250
Description  14-Bit, 170 MSPS/250 MSPS, JESD204B,Dual Analog-to-Digital Converter
PDF  44 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9250 Datasheet(HTML) 32 Page - Analog Devices

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AD9250
Data Sheet
Rev. 0 | Page 32 of 44
BUILT-IN SELF-TEST (BIST) AND OUTPUT TEST
The AD9250 includes built-in test features designed to enable
verification of the integrity of each channel as well as facilitate
board level debugging. A BIST feature is included that verifies
the integrity of the digital datapath of the AD9250. Various output
test options are also provided to place predictable values on the
outputs of the AD9250.
BUILT-IN SELF-TEST
The BIST is a thorough test of the digital portion of the selected
AD9250 signal path. When enabled, the test runs from an internal
pseudo-random noise (PN) source through the digital datapath
starting at the ADC block output. The BIST sequence runs for
512 cycles and stops. The BIST signature value for Channel A
and/or Channel B is placed in Register 0x24 and Register 0x25.
The outputs are connected during this test; therefore, the PN
sequence can be observed as it runs. The PN sequence can be
continued from its last value or reset from the beginning, based
on the value programmed in Register 0x0E, Bit 2. The BIST
signature result varies based on the channel configuration.



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