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AD7866 Datasheet(PDF) 11 Page - Analog Devices

Part # AD7866
Description  Dual 1 MSPS, 12-Bit, 2-Channel SAR ADC with Serial Interface
PDF  20 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7866 Datasheet(HTML) 11 Page - Analog Devices

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REV. 0
AD7866
–11–
analog input range will be 0 V to VREF and the output coding
from the part will be straight binary (for the next conversion). If this
pin is at a logic high when
CS goes low, then the analog input
range will be 2
× V
REF and the output coding for the part will
be two’s complement. However, if after the falling edge of
CS,
the logic level of the RANGE pin has changed upon the eighth
falling SCLK edge, point B, the output coding will change to the
other option without any change in the analog input range. So for
the next conversion, two’s complement output coding could be selected
with a 0 V to VREF input range, for example, if the RANGE pin
is low upon the falling edge of
CS and high upon the eighth falling
SCLK edge, as shown in Figure 7. Figures 5 through 8 show
examples of timing diagrams when selecting a particular analog input
range with a particular output coding format. Table I also summarizes
the required logic level of the RANGE pin for each selection.
The Logic Input A0 is used to select the pair of channels to be
converted simultaneously. The Logic state of this pin is also
checked upon the falling edge of
CS and the multiplexers are set
up for the next conversion. If it is low, the following conversion
STRAIGHT BINARY
0V TO V
REF
INPUT RANGE
CS
SCLK
RANGE
DOUTA
DOUTB
1
8
16
16
1
AB
Figure 5. Selecting 0 V to VREF Input Range with Straight Binary Output Coding
CS
SCLK
RANGE
DOUTA
DOUTB
1
8
16
16
1
AB
V
REF
V
REF
INPUT RANGE
TWO’S COMPLEMENT
Figure 6. Selecting VREF
± VREF Input Range with Two’s Complement Output Coding
will be performed on Channel 1 of each ADC; if it is high,
the following conversion will be performed on Channel 2 of
each ADC.
Handling Bipolar Input Signals
Figure 9 shows how useful the combination of the 2
× V
REF input
range and the two’s complement output coding scheme is for
handling bipolar input signals. If the bipolar input signal is biased
about VREF and two’s complement output coding is selected,
then VREF becomes the zero code point, –VREF is negative full-
scale and +VREF becomes positive full-scale, with a dynamic
range of 2
× V
REF.
Transfer Functions
The designed code transitions occur at successive integer LSB
values (i.e., 1 LSB, 2 LSBs, etc.). The LSB size is = VREF/4096.
The ideal transfer characteristic for the AD7866 when straight
binary coding is selected is shown in Figure 10 and the ideal
transfer characteristic for the AD7866 when two’s complement
coding is selected is shown in Figure 11.
Table I. Analog Input and Output Coding Selection
Range Level
Range Level
@ Point A
1
@ Point B
2
Input Range
3
Output Coding
3
Low
Low
0 V to VREF
Straight Binary
High
High
VREF
± VREF
Two’s Complement
Low
High
VREF /2
± VREF /2
Two’s Complement
High
Low
0 V to 2
× V
REF
Straight Binary
NOTES
1Point A = Falling edge of
CS.
2Point B = Eighth falling edge of SCLK.
3Selected for NEXT conversion.



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