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a

AD9218

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

www.analog.com

Fax: 781/326-8703

© Analog Devices, Inc., 2001

FUNCTIONAL BLOCK DIAGRAM

10-Bit, 40/65/80/105 MSPS

3 V Dual A/D Converter

FUNCTIONAL BLOCK DIAGRAM

TIMING

ADC

OUTPUT

REGISTER

REF

T/H

10

10

ADC

OUTPUT

REGISTER

T/H

10

10

TIMING

USER

SELECT #1

USER

SELECT #2

DATA

FORMAT/

GAIN

GND

AD9218

ENCODE A

ENCODE B

FEATURES

Dual 10-Bit, 40 MSPS, 65 MSPS, 80 MSPS, and

105 MSPS ADC

Low Power: 275 mW at 105 MSPS per Channel

On-Chip Reference and Track/Holds

300 MHz Analog Bandwidth Each Channel

SNR = 57 dB @ 41 MHz, Encode = 80 MSPS

1 V p-p or 2 V p-p Analog Input Range Each Channel

Single 3.0 V Supply Operation (2.7 V–3.6 V)

Power-Down Mode for Single Channel Operation

Two’s Complement or Offset Binary Output Mode

Output Data Alignment Mode

Pin-Compatible with 8-Bit AD9288

–75 dBc Crosstalk between Channels

APPLICATIONS

Battery-Powered Instruments

Hand-Held Scopemeters

Low Cost Digital Oscilloscopes

I and Q Communications

Ultrasound Equipment

GENERAL DESCRIPTION

The AD9218 is a dual 10-bit monolithic sampling analog-to-

digital converter with on-chip track-and-hold circuits and is

optimized for low cost, low power, small size and ease of use.

The product operates at a 105 MSPS conversion rate with

outstanding dynamic performance over its full operating range.

Each channel can be operated independently.

The ADC requires only a single 3.0 V (2.7 V to 3.6 V) power

supply and an encode clock for full operation. No external

reference or driver components are required for many applica-

tions. The digital outputs are TTL/CMOS-compatible and a

separate output power supply pin supports interfacing with

3.3 V or 2.5 V logic.

The clock input is TTL/CMOS-compatible and the 10-bit

digital outputs can be operated from 3.0 V (2.5 V to 3.6 V)

supplies. User-selectable options are available to offer a combi-

nation of power-down modes, digital data formats and digital

data timing schemes. In power-down mode, the digital outputs

are driven to a high-impedance state.

Fabricated on an advanced CMOS process, the AD9218 is

available in a 48-lead surface-mount plastic package (7

× 7 mm

LQFP) specified over the industrial temperature range (–40

°C

to +85

°C).

PRODUCT HIGHLIGHTS

Low Power—Just 275 mW power dissipation per channel at

105 MSPS. Other speed grade proportionally scaled down while

maintaining high ac performance.

Pin Compatibility Upgrade—Allows easy migration from 8-bit

to 10-bit. Pin-compatible with the 8-bit AD9288 dual ADC.

Ease of Use—On-chip reference and user controls provide flex-

ibility in system design.

High Performance—Maintain 54 dB SNR at 105 MSPS with a

Nyquist input.

Channel Crosstalk—Very low at –75 dBc.