ADM9240 datasheet(3/22 Pages) AD

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–3–

REV. 0

ADM9240

Parameter

Min

Typ

Max

Units

Test Conditions/Comments

OPEN-DRAIN SERIAL DATA BUS

OUTPUT (SDA)

Output Low Voltage, VOL

0.4

IOUT = –3.0 mA,

VCC = 4.25 V–5.75 V

0.4

IOUT = –3.0 mA

VCC = 2.85 V–3.45 V

High Level Output Current, IOH

0.1

100

µAV

OUT = VCC

SERIAL BUS DIGITAL INPUTS

(SCL, SDA)

Input High Voltage, VIH

0.7

× V

Input Low Voltage, VIL

0.3

× V

Hysteresis

500

DIGITAL INPUT LOGIC LEVELS

(A0, A1, CI,

RESET, VID0 – VID4,

FAN1, FAN2)

Input High Voltage, VIH

2.4

VCC = 4.25 V–5.75 V

Input Low Voltage, VIL

0.8

VCC = 4.25 V–5.75 V

Input High Voltage, VIH

2.0

VCC = 2.85 V–3.45 V

Input Low Voltage, VIL

0.4

VCC = 2.85 V–3.45 V

NTEST_IN

Input High Voltage, VIH

2.4

VCC = 4.25 V–5.75 V

Input High Voltage, VIH

2.0

VCC = 2.85 V–3.45 V

DIGITAL INPUT CURRENT

Input High Current, IIH

–1

µAV

IN = VCC

Input High Current, A0, A1, IIH

–200

µAV

IN = VCC (Note 6)

Input Low Current, IIL

µAV

IN = 0

Input Capacitance, CIN

SERIAL BUS TIMING

Clock Frequency, fSCLK

400

kHz

See Figure 1

Glitch Immunity, tSW

See Figure 1

Bus Free Time, tBUF

1.3

µs

See Figure 1

Start Setup Time, tSU;STA

600

See Figure 1

Start Hold Time, tHD;STA

600

See Figure 1

SCL Low Time, tLOW

1.3

µs

See Figure 1

SCL High Time, tHIGH

0.6

µs

See Figure 1

SCL, SDA Rise Time, tR

300

See Figure 1

SCL, SDA Fall Time, tF

300

µs

See Figure 1

Data Setup Time, tSU;DAT

100

See Figure 1

Data Hold Time, tHD;DAT

900

See Figure 1

NOTES

1All voltages are measured with respect to GND, unless otherwise noted.

2Typicals are at T

A = +25

°C and represent most likely parametric norm. Shutdown current typ is measured with V

CC = 3.3 V.

3TUE (Total Unadjusted Error) includes Offset, Gain and Linearity errors of the ADC, multiplexer and on-chip input attenuators, including an external series input

protection resistor value between zero and 1 k

Ω.

4Total monitoring cycle time is the time taken to measure all six analog inputs plus the temperature sensor.

5The total fan count is based on 2 pulses per revolution of the fan tachometer output.

6A0 and A1 have internal 75 k

Ω pull-down.

7Timing specifications are tested at logic levels of V

IL = 0.3

× V

CC for a falling edge and V IH = 0.7

× V

CC for a rising edge.

Specifications subject to change without notice.

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