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ADV7202 Datasheet(PDF) 2 Page - Analog Devices |
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ADV7202 Datasheet(HTML) 2 Page - Analog Devices |
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2 / 26 page ![]() REV. PrB PRELIMINARY TECHNICAL DATA –2– ADV7202–SPECIFICATIONS 5 V SPECIFICATIONS (AVDD/DVDD = 5 V 5%, V REF = 1.235 V RSET = 1.2 k , all specifications TMIN to TMAX 1 unless otherwise noted.) Parameter Min Typ Max Unit Test Conditions STATIC PERFORMANCE Resolution (Each DAC) 10 Bits Accuracy (Each DAC) 10 Integral Nonlinearity ±2 LSB 10-Bit Operation Differential Nonlinearity ±2 LSB 10-Bit Operation VIDEO ADC Resolution 10 Bits (plus 2-Bits for gain ranging) 2.2 V Ref. Accuracy 10 Integral Nonlinearity ±1 LSB 10-Bit Differential Nonlinearity ±0.25 LSB 10-Bit Input Voltage Range 2 –VREFADC +VREFADC See Figure TBD SNR 62 dB 27 MHz Clock, fIN = 100 kHz 50 dB 54 MHz Clock, fIN = 100 kHz AUX ADC Resolution 8 Bits Differential Nonlinearity ±1 LSB Guaranteed Monotonic Integral Nonlinearity ±2 LSB SNR 44 dB 27 MHz Clock Input Voltage Range 0 2 VREFADC V DIGITAL INPUTS Input High Voltage, VINH 2V Input Low Voltage, VINL 0.8 V Input Current, IIN ±1 µA Input Capacitance, CIN TBD pF DIGITAL OUTPUTS Output High Voltage, VOH 2.4 V ISOURCE = 400 µA Output Low Voltage, VOL 0.4 V ISINK = 3.2 mA Three-State Leakage Current 10 µA Output Capacitance 10 pF Digital Output Access Time, t14 8 ns See Figure 16 Digital Output Hold Time, t15 3ns ANALOG OUTPUTS Output Current 4.33 mA RSET = 1.2 k Ω, R L = 300 Ω DAC-to-DAC Matching 2 % Output Compliance, VOC 0 +1.4 V Output Impedance, ROUT 50 k Ω Output Capacitance, COUT 30 pF IOUT = 0 mA Analog Output Delay 3 7ns DAC Output Skew 0 ns VOLTAGE REFERENCE Reference Range, VREFDAC 1.235 V Reference Range, VREFADC 2.200 V Programmable 1.1 V or 2.2 V Reference Range, VREFADC 1.100 V NOTES 10 °C to 70°C 2SHA gain = 1, half range for SHA gain = 2, see Table II. 3Output Delay measured from 50% of the rising edge of the clock to the 50% point of full-scale transition. Specifications subject to change without notice. |
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