CO

1

C6 =

2

R7 10 F

× p ×

×

×

CO

1

C7 =

F

2

R7

10

× p ×

×

PWRSTG

G

20

REF

EA

OUT

V

10

R7 =

gm

V

-

×

-180

-120

-60

0

60

120

180

-60

-40

-20

0

20

40

60

1.00E+01

1.00E+02

1.00E+03

1.00E+04

1.00E+05

1.00E+06

Frequency - Hz

C005

Gain

Phase

Power stage gain = -3.41dB @ 50 kHz

TPS56921

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SLVSBL4 – OCTOBER 2012

Figure 26. Power stage Gain and Phase Characteristics

For this design, the intended crossover frequency is 50 kHz. From the power stage gain and phase plots, the

gain at 50 kHz is -3.41 dB and the phase is about -110 degrees. For 60 degrees of phase margin, additional

phase boost from a feed forward capacitor in parallel with the upper resistor of the voltage set point divider is not

needed. R7 sets the gain of the compensated error amplifier to be equal and opposite the power stage gain at

crossover. The required value of R7 can be calculated from Equation 27.

(27)

To maximize phase gain, the compensator zero is placed one decade below the crossover frequency of 50 kHz.

The required value for C7 is given by Equation 28.

(28)

To maximize phase gain the high frequency pole is placed one decade above the crossover frequency of 50 kHz.

The pole can also be useful to offset the ESR of aluminum electrolytic output capacitors. The value for C6 can be

calculated from Equation 29.

(29)

For this design the calculated values for the compensation components are R7 = 1.58 k

Ω ,C7 = 0.022 µF and C6

= 220 pF.

Copyright © 2012, Texas Instruments Incorporated

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