TPS65281RGVR datasheet(23/31 Pages) TI

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Re sr Co

× p

fc Vo Co

Vref gm

p ×

out max

0.25

TPS65281, TPS65281-1

www.ti.com

SLVSBH7B – JULY 2012 – REVISED DECEMBER 2012

The input capacitance value determines the input ripple voltage of the regulator. The input voltage ripple can be

calculated using Equation 14. Using the design example values, Iout_max = 2 A, CIN = 10 µF, fSW = 600 kHz, yields

an input voltage ripple of 83 mV.

(14)

To prevent large voltage transients, a low ESR capacitor sized for the maximum RMS current must be used.

Bootstrap Capacitor Selection

The external bootstrap capacitor connected to the BST pins supply the gate drive voltages for the topside

MOSFETs. The capacitor between BST pin and LX pin is charged through an internal diode from V7V when the

LX pin is low. When high side MOSFETs are to be turned on, the driver places the bootstrap voltage across the

gate-source of the desired MOSFET. This enhances the top MOSFET switch and turns it on. The switch node

voltage, LX, rises to VIN and the BST pin follows. With the internal high side MOSFET on, the bootstrap voltage

is above the input supply: VBST = VIN + V7V. The selection on bootstrap capacitance is related with internal high

side power MOSFET gate capacitance. A 0.047-

μF ceramic capacitor is recommended to be connected between

the BST to LX pin for proper operation. It is recommended to use a ceramic capacitor with X5R or better grade

dielectric. The capacitor should have 10-V or higher voltage rating.

Loop Compensation

The integrated buck DC/DC converter in TPS65281 incorporates a peak current mode. The error amplifier is a

trans-conductance amplifier with a gain of 500 µA/V. A typical type II compensation circuit adequately delivers a

phase margin between 60° and 90°. Cb adds a high frequency pole to attenuate high frequency noise when

needed. To calculate the external compensation components, follow these steps:

1. Select switching frequency, fSW, that is appropriate for application depending on L and C sizes, output ripple

and EMI. Switching frequency between 500 kHz and 1 MHz gives the best trade off between performance

and cost. To optimize efficiency, a lower switching frequency is desired.

2. Set up cross over frequency, fc, which is typically between 1/5 and 1/20 of fSW.

3. RC can be determined by:

(15)

where gm is the error amplifier gain (500 µA/V) and gmps is the power stage voltage to current conversion

gain (20 A/V).

4. Calculate CC by placing a compensation zero at or before the dominant pole,

(16)

5. Optional Cb can be used to cancel the zero from the ESR associated with CO.

(17)

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