SPRUG21 datasheet(51/214 Pages) TI

51 / 214 page

TMS320C6474

www.ti.com

SPRS552H

– OCTOBER 2008 – REVISED APRIL 2011

System Interconnect

On the C6474 device, the C64x+ Megamodule, the EDMA3 transfer controllers, and the system

peripherals are interconnected through two switch fabrics. The switch fabrics allow for low-latency,

concurrent data transfers between master peripherals and slave peripherals. Through a switch fabric the

CPU can send data to the Viterbi co-processor (VCP2) without affecting a data transfer through the DDR2

memory controller. The switch fabrics also allow for seamless arbitration between the system masters

when accessing system slaves.

4.1

Internal Buses, Switch Fabrics, and Bridges/Gaskets

Two types of buses exist in the C6474 device: data buses and configuration buses. Some C6474

peripherals have both a data bus and a configuration bus interface, while others only have one type of

interface. Furthermore, the bus interface width and speed varies from peripheral to peripheral.

Configuration buses are mainly used to access the register space of a peripheral and the data buses are

used mainly for data transfers. However, in some cases, the configuration bus is also used to transfer

data. For example, data is transferred to the VCP2 and TCP2 via their configuration bus interface.

Similarly, the data bus can also be used to access the register space of a peripheral. For example, the

DDR2 memory controller registers are accessed through their data bus interface.

The C64x+ megamodule, the EDMA3 transfer controllers, and the various system peripherals can be

classified into two categories: masters and slaves. Masters are capable of initiating read and write

transfers in the system and do not rely on the EDMA3 for their data transfers. Slaves on the other hand

rely on the EDMA3 to perform transfers to and from them. Examples of masters include the EDMA3

transfer controllers, SRIO, and EMAC. Examples of slaves include the McBSP and I2C.

The C6474 device contains two switch fabrics through which masters and slaves communicate. The data

switch fabric, known as the data switched central resource (SCR), is a high-throughput interconnect

mainly used to move data across the system (for more information, see Section 4.3). The SCR adds no

latency and allows seamless arbitration (i.e., no dead cycles inserted by the fabric) between the masters

and slaves. The data SCR connects masters to slaves via 128-bit data buses (SCR B) and 64-bit data

buses (SCR A) running at a CPU/3 frequency (CPU/3 is generated from PLL1 controller). Peripherals that

have a 128-bit data bus interface running at this speed can connect directly to the data SCR; other

peripherals require a bridge.

The configuration switch fabric, also known as the configuration switch central resource (SCR) is mainly

used by the C64x+ Megamodule to access peripheral registers (for more information, see Section 4.4).

The configuration SCR connects C64x+ Megamodule to slaves via 32-bit configuration buses running at a

CPU/3 frequency (CPU/3 is generated from PLL1 controller). As with the data SCR, some peripherals

require the use of a bridge to interface to the configuration SCR. Note that the data SCR also connects to

the configuration SCR.

Bridges and gaskets are required to perform a variety of functions. For the purpose of this document,

bridges and gaskets can be considered as identical. Within the switch fabric infrastructure, gaskets are

simpler than bridges in that they only modify control signals to convert protocols. Bridges perform a variety

of functions:

•

Conversion between configuration bus and data bus.

•

Width conversion between peripheral bus width and SCR bus width.

•

Frequency conversion between peripheral bus frequency and SCR bus frequency.

For more information on the common bus architecture and its throughput in the C6474 device, see the

TMS320C6474 Common Bus Architecture Throughput application report (literature number SPRAAX6)

and the TMS320C6474 Module Throughput application report (literature number SPRAAW5).

System Interconnect

Submit Documentation Feedback

Product Folder Link(s) :TMS320C6474

SPRUG21 Datasheet(PDF) 51 Page - Texas Instruments

SPRUG21 Datasheet(HTML) 51 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL