| Electronic Components Datasheet Search |
|
LPC4350 Datasheet(PDF) 64 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
LPC4350 Datasheet(HTML) 64 Page - NXP Semiconductors |
|
64 / 153 page ![]() LPC4350_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 4 — 26 March 2013 64 of 153 NXP Semiconductors LPC4350/30/20/10 32-bit ARM Cortex-M4/M0 microcontroller 7.6.1 Features • Controls system exceptions and peripheral interrupts. • The Cortex-M4 NVIC supports up to 53 vectored interrupts. • Eight programmable interrupt priority levels with hardware priority level masking. • Relocatable vector table. • Non-Maskable Interrupt (NMI). • Software interrupt generation. 7.6.2 Interrupt sources Each peripheral device has one interrupt line connected to the NVIC but may have several interrupt flags. Individual interrupt flags can represent more than one interrupt source. 7.7 System Tick timer (SysTick) The ARM Cortex-M4 includes a system tick timer (SYSTICK) that is intended to generate a dedicated SYSTICK exception at a 10 ms interval. 7.8 Event router The event router combines various internal signals, interrupts, and the external interrupt pins (WAKEUP[3:0]) to create an interrupt in the NVIC, if enabled. In addition, the event router creates a wake-up signal to the ARM core and the CCU for waking up from Sleep, Deep-sleep, Power-down, and Deep power-down modes. Individual events can be configured as edge or level sensitive and can be enabled or disabled in the event router. The event router can be battery powered. The following events if enabled in the event router can create a wake-up signal from sleep, deep-sleep, power-down, and deep power-down modes and/or create an interrupt: • External pins WAKEUP0/1/2/3 and RESET • Alarm timer, RTC (32 kHz oscillator running) The following events if enabled in the event router can create a wake-up signal from sleep mode only and/or create an interrupt: • WWDT, BOD interrupts • C_CAN0/1 and QEI interrupts • Ethernet, USB0, USB1 signals • Selected outputs of combined timers (SCT and timer0/1/3) Remark: Any interrupt can wake up the ARM Cortex-M4 from sleep mode if enabled in the NVIC. 7.9 Global Input Multiplexer Array (GIMA) The GIMA routes signals to event-driven peripheral targets like the SCT, timers, event router, or the ADCs. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |