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LPC4350 Datasheet(PDF) 90 Page - NXP Semiconductors

Part # LPC4350
Description  32-bit ARM Cortex-M4/M0 MCU; up to 264 kB SRAM; Ethernet; two High-speed USBs; advanced configurable peripherals
PDF  153 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC4350 Datasheet(HTML) 90 Page - NXP Semiconductors

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LPC4350_30_20_10
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 26 March 2013
90 of 153
NXP Semiconductors
LPC4350/30/20/10
32-bit ARM Cortex-M4/M0 microcontroller
IBAT
battery supply current
VDD(REG)(3V3) = 3.3 V;
VBAT = 3.6 V
deep-sleep mode
[8]
-2
-
A
power-down mode
[8] -2
-
A
deep power-down
mode
[8]
-2
-
A
IDD(IO)
I/O supply current
deep sleep mode
- -
1
-
A
power-down mode
- -
1
-
A
deep power-down mode
- -
0.05
-
A
IDDA
Analog supply current
on pin VDDA;
deep sleep mode
[10] -0.4
-
A
power-down mode
[10] -0.4
-
A
deep power-down
mode
[10] -0.007
-
A
RESET pin
VIH
HIGH-level input
voltage
[9] 0.8
 (V
ps
0.35)
-5.5
V
VIL
LOW-level input voltage
[9] 0
-
0.3
 (V
ps
0.1)
V
Vhys
hysteresis voltage
[9] 0.05
 (V
ps
 0.35)
--V
Standard I/O pins - normal drive strength
CI
input capacitance
-
-
2
pF
ILL
LOW-level leakage
current
VI = 0 V; on-chip pull-up
resistor disabled
-3
-nA
ILH
HIGH-level leakage
current
VI =VDD(IO); on-chip
pull-down resistor
disabled
-3
-nA
VI = 5 V
--20
nA
IOZ
OFF-state output
current
VO =0V to VDD(IO);
on-chip pull-up/down
resistors disabled;
absolute value
-3
-nA
VI
input voltage
pin configured to provide
a digital function;
VDD(IO)  2.2 V
0-
5.5
V
VDD(IO) = 0 V
0
-
3.6
V
VO
output voltage
output active
0
-
VDD(IO)
V
VIH
HIGH-level input
voltage
0.7
VDD(IO)
-5.5
V
VIL
LOW-level input voltage
0
-
0.3
VDD(IO)
V
Vhys
hysteresis voltage
0.1
VDD(IO)
--V
Table 10.
Static characteristics …continued
Tamb = 40 C to +85 C, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ[1]
Max
Unit



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