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HT66F20 Datasheet(PDF) 190 Page - Holtek Semiconductor Inc |
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HT66F20 Datasheet(HTML) 190 Page - Holtek Semiconductor Inc |
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190 / 298 page  Rev. 1.90 190 �e���a�� 18� �01� Rev. 1.90 191 �e���a�� 18� �01� HT66F20/HT66F30/HT66F40/HT66F50/HT66F60 HT66FU30/HT66FU40/HT66FU50/HT66FU60 Enhanced A/D Flash Type 8-Bit MCU with EEPROM HT66F20/HT66F30/HT66F40/HT66F50/HT66F60 HT66FU30/HT66FU40/HT66FU50/HT66FU60 Enhanced A/D Flash Type 8-Bit MCU with EEPROM SIMC2 Register Bit 7 6 5 4 3 2 1 0 Name D7 D6 CKPOLB CKEG MLS CSEN WCOL TR� R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 0 0 0 0 0 0 0 0 Bit7~6 Undefinedbit Thisbitcanbereadorwrittenbyusersoftwareprogram. Bit5 CKPOLB:Determinesthebaseconditionoftheclockline 0:TheSCKlinewillbehighwhentheclockisinactive 1:TheSCKlinewillbelowwhentheclockisinactive TheCKPOLBbitdeterminesthebaseconditionoftheclockline,ifthebitishigh, thentheSCKlinewillbelowwhentheclockisinactive.WhentheCKPOLBbitis low,thentheSCKlinewillbehighwhentheclockisinactive. Bit4 CKEG:DeterminesSPISCKactiveclockedgetype CKPOLB=0 0:SCKishighbaselevelanddatacaptureatSCKrisingedge 1:SCKishighbaselevelanddatacaptureatSCKfallingedge CKPOLB=1 0:SCKislowbaselevelanddatacaptureatSCKfallingedge 1:SCKislowbaselevelanddatacaptureatSCKrisingedge TheCKEGandCKPOLBbitsareusedtosetupthewaythattheclocksignaloutputs andinputsdataontheSPIbus.Thesetwobitsmustbeconfiguredbeforedatatransfer isexecutedotherwiseanerroneousclockedgemaybegenerated.TheCKPOLBbit determinesthebaseconditionoftheclockline,ifthebitishigh,thentheSCKline willbelowwhentheclockisinactive.WhentheCKPOLBbitislow,thentheSCK linewillbehighwhentheclockisinactive.TheCKEGbitdeterminesactiveclock edgetypewhichdependsupontheconditionofCKPOLBbit. Bit3 MLS:SPIDatashiftorder 0:LSB 1:MSB Thisisthedatashiftselectbitandisusedtoselecthowthedataistransferred,either MSBorLSBfirst.SettingthebithighwillselectMSBfirstandlowforLSBfirst. Bit2 CSEN:SPISCSpinControl 0:Disable 1:Enable TheCSENbitisusedasanenable/disablefortheSCSpin.Ifthisbitislow,thenthe SCSpinwillbedisabledandplacedintoafloatingcondition.IfthebitishightheSCS pinwillbeenabledandusedasaselectpin. NotethatusingtheCSENbitcanbedisabledorenabledviaconfigurationoption. Bit1 WCOL:SPIWriteCollisionflag 0:Nocollision 1:Collision TheWCOLflagisusedtodetectifadatacollisionhasoccurred.Ifthisbitishighit meansthatdatahasbeenattemptedtobewrittentotheSIMDregisterduringadata transferoperation.Thiswritingoperationwillbeignoredifdataisbeingtransferred. Thebitcanbeclearedbytheapplicationprogram.NotethatusingtheWCOLbitcan bedisabledorenabledviaconfigurationoption. Bit0 TRF:SPITransmit/ReceiveCompleteflag 0:Dataisbeingtransferred 1:SPIdatatransmissioniscompleted TheTRFbitistheTransmit/ReceiveCompleteflagandisset1automaticallywhen anSPIdatatransmissioniscompleted,butmustsetto0bytheapplicationprogram.It canbeusedtogenerateaninterrupt. |
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