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HT66F20 Datasheet(PDF) 191 Page - Holtek Semiconductor Inc |
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HT66F20 Datasheet(HTML) 191 Page - Holtek Semiconductor Inc |
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191 / 298 page ![]() Rev. 1.90 190 �e���a�� 18� �01� Rev. 1.90 191 �e���a�� 18� �01� HT66F20/HT66F30/HT66F40/HT66F50/HT66F60 HT66FU30/HT66FU40/HT66FU50/HT66FU60 Enhanced A/D Flash Type 8-Bit MCU with EEPROM HT66F20/HT66F30/HT66F40/HT66F50/HT66F60 HT66FU30/HT66FU40/HT66FU50/HT66FU60 Enhanced A/D Flash Type 8-Bit MCU with EEPROM SPI Communication AftertheSPIinterfaceisenabledbysettingtheSIMENbithigh,thenintheMasterMode,when dataiswrittentotheSIMDregister,transmission/receptionwillbeginsimultaneously.Whenthe datatransferiscomplete,theTRFflagwillbesetautomatically,butmustbeclearedusingthe applicationprogram.IntheSlaveMode,whentheclocksignalfromthemasterhasbeenreceived, anydataintheSIMDregisterwillbetransmittedandanydataontheSDIpinwillbeshiftedinto theSIMDregister.ThemastershouldoutputanSCSsignaltoenabletheslavedevicebeforea clocksignalisprovided.Theslavedatatobetransferredshouldbewellpreparedattheappropriate momentrelativetotheSCSsignaldependingupontheconfigurationsoftheCKPOLBbitandCKEG bit.TheaccompanyingtimingdiagramshowstherelationshipbetweentheslavedataandSCSsignal forvariousconfigurationsoftheCKPOLBandCKEGbits. TheSPIwillcontinuetofunctionevenintheIDLEMode. SC K (C KP OL B= 1, C KE G= 0) SI ME N, C SE N= 1 SI ME N= 1, C SE N= 0 (E xt er nal P ul l- Hi gh ) SC K (C KP OL B= 0 , C KE G= 0) SC K (C KP OL B= 1 , C KE G= 1) SC K (C KP OL B= 0 , C KE G= 1) SD O (C KE G= 0) SD O (C KE G= 1) SC S SD I Da ta C apt ur e D7 /D 0D 6/ D1 D5 /D 2D 4/ D3 D3 /D 4D 2/ D5 D1 /D 6D 0/ D7 D7 /D 0D 6/ D1 D5 /D 2D 4/ D3 D3 /D 4D 2/ D5 D1 /D 6D 0/ D7 Wr it e to S IM D SPI Master Mode Timing SC K (C KP OL B= 1) SC K (C KP OL B= 0) SD O SC S SD I Da ta C apt ur e D7 /D 0D 6/ D1 D5 /D 2D 4/ D3 D3 /D 4D 2/ D5 D1 /D 6D 0/ D7 Wr it e to S IM D (S DO d oe s not c hange un ti l fi rs t SC K edge ) SPI Slave Mode Timing – CKEG=0 |
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