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HT66F20 Datasheet(PDF) 249 Page - Holtek Semiconductor Inc |
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HT66F20 Datasheet(HTML) 249 Page - Holtek Semiconductor Inc |
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249 / 298 page  Rev. 1.90 �48 �e���a�� 18� �01� Rev. 1.90 �49 �e���a�� 18� �01� HT66F20/HT66F30/HT66F40/HT66F50/HT66F60 HT66FU30/HT66FU40/HT66FU50/HT66FU60 Enhanced A/D Flash Type 8-Bit MCU with EEPROM HT66F20/HT66F30/HT66F40/HT66F50/HT66F60 HT66FU30/HT66FU40/HT66FU50/HT66FU60 Enhanced A/D Flash Type 8-Bit MCU with EEPROM Bit5 BRGH:BaudRatespeedselection 0:Lowspeedbaudrate 1:Highspeedbaudrate ThebitnamedBRGHselectsthehighorlowspeedmodeoftheBaudRateGenerator. Thisbit,togetherwiththevalueplacedinthebaudrateregisterBRG,controlsthe BaudRateoftheUART.Ifthisbitisequalto1,thehighspeedmodeisselected.Ifthe bitisequalto0,thelowspeedmodeisselected. Bit4 ADDEN:Addressdetectfunctionenablecontrol 0:Addressdetectfunctionisdisabled 1:Addressdetectfunctionisenabled ThebitnamedADDENistheaddressdetectfunctionenablecontrolbit.Whenthis bitisequalto1,theaddressdetectfunctionisenabled.Whenitoccurs,ifthe8th bit,whichcorrespondstoRX7ifBNO=0orthe9thbit,whichcorrespondstoRX8 ifBNO=1,hasavalueof1,thenthereceivedwordwillbeidentifiedasanaddress, ratherthandata.Ifthecorrespondinginterruptisenabled,aninterruptrequestwillbe generatedeachtimethereceivedwordhastheaddressbitset,whichisthe8thor9th bitdependingonthevalueofBNO.Iftheaddressbitknownasthe8thor9thbitofthe receivedwordis0withtheaddressdetectfunctionbeingenabled,aninterruptwillnot begeneratedandthereceiveddatawillbediscarded. Bit3 WAKE:RXpinfallingedgewake-upfunctionenablecontrol 0:RXpinwake-upfunctionisdisabled 1:RXpinwake-upfunctionisenabled Thisbitenablesordisablesthereceiverwake-upfunction.Ifthisbitisequalto1and theMCUisinIDLEorSLEEPmode,afallingedgeontheRXinputpinwillwake-up thedevice.Ifthisbitisequalto0andtheMCUisinIDLEorSLEEPmode,anyedge transitionsontheRXpinwillnotwake-upthedevice. Bit2 RIE:Receiverinterruptenablecontrol 0:Receiverrelatedinterruptisdisabled 1:Receiverrelatedinterruptisenabled Thisbitenablesordisablesthereceiverinterrupt.Ifthisbitisequalto1andwhen thereceiveroverrunflagOERRorreceivedataavailableflagRXIFisset,theUART interruptrequestflagwillbeset.Ifthisbitisequalto0,theUARTinterruptrequest flagwillnotbeinfluencedbytheconditionoftheOERRorRXIFflags. Bit1 TIIE:TransmitterIdleinterruptenablecontrol 0:Transmitteridleinterruptisdisabled 1:Transmitteridleinterruptisenabled Thisbitenablesordisablesthetransmitteridleinterrupt.Ifthisbitisequalto1and whenthetransmitteridleflagTIDLEisset,duetoatransmitteridlecondition,the UARTinterruptrequestflagwillbeset.Ifthisbitisequalto0,theUARTinterrupt requestflagwillnotbeinfluencedbytheconditionoftheTIDLEflag. Bit0 TEIE:TransmitterEmptyinterruptenablecontrol 0:Transmitteremptyinterruptisdisabled 1:Transmitteremptyinterruptisenabled Thisbitenablesordisablesthetransmitteremptyinterrupt.Ifthisbitisequalto1and whenthetransmitteremptyflagTXIFisset,duetoatransmitteremptycondition,the UARTinterruptrequestflagwillbeset.Ifthisbitisequalto0,theUARTinterrupt requestflagwillnotbeinfluencedbytheconditionoftheTXIFflag. |
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