AFE5809ZCF datasheet(49/90 Pages) TI

49 / 90 page

AFE5809

www.ti.com

SLOS738C – SEPTEMBER 2012 – REVISED JANUARY 2013

Profile RAM and Coefficient RAM

Writing data to Profile RAM and Coefficient RAM is similar to registers. Both RAMs do not get reset after

resetting the device. RAM does not have default values, so it is necessary to write required values to RAM. RAM

address values needs to be given to pointer register that points to the location wherever data needs to be written.

Since both RAMs are part of Demodulator, SPI_DIG_EN should be low while writing.

It is recommended to program the RAMs before configuring other registers.

Table 18. Profile Related Registers

SPI Address

PROFILE_MEM_ADDR_WR

0x08[4:0]

PROFILE_BANK

0x09[63:0]

PROFILE_INDEX

0x0E[15:11]

spacer

•

Profile RAM can store up to 32 Vectors/Profiles. Each Vector/Profile has 64 bits.

•

Pointer Value should be given to the register PROFILE_MEM_ADDR_WR before writing to RAM.

•

The 64 bits of each Vector/Profile are arranged as follows:

Table 19. Profile RAM

Name of parameter

Address

Description

Reserved

RAM[63:50]

Set to 0

Reserved

RAM[49:36]

Set to 0

Pointer to Coeff Memory (P)*

RAM[35:28]

A pointer to filter coefficient memory (8 bit), pointing to 8coefficients

blocks. The relevant coefficients will start from address P*8 in the

coefficients memory and will continue for M blocks.

Decimation Factor (M)*

RAM[27:22]

Decimation Factor for Decimation Block

Down Conversion Frequency (f)*

RAM[21:6]

Down Conversion frequency for Down Conversion Block

Reserved

RAM[5]

Set to 0

Gain Compensation Factor (G) *

RAM[4:2]

Gain Compensation Factor Parameter for Decimation block

*Alternate manual register is available

• 2 LSB’s (that is RAM[1:0]) are ignored and can be set as 0s.

• A particular profile vector can be activated using register PROFILE_INDEX. Address pointing to the location of particular vector is to be

given in PROFILE_INDEX.

Table 20. Coefficient RAM

SPI Address

COEFF_MEM_ADDR_WR

0x06[7:0]

COEFF_BANK

0x07[111:0]

MANUAL_COEFF_START_ADDR

0x1F[14:7]

MANUAL_COEFF_START_EN

0x1F[15]

spacer

•

Coefficient RAM can store up to 256 coefficient memory blocks. Size of each block is 112 bits.

•

Pointer Value should be given to the register COEFF_MEM_ADDR_WR before writing to RAM.

•

Write 112 bits to SPI address 0xC7 (MSB first). Each coefficient memory block consists of 8 14bit coefficients

which are aligned in the following manner: (Coefficient order from right to left. Bit order from right to left).

•

Note: the coefficients are in 2's complement format.

Submit Documentation Feedback

Product Folder Links: AFE5809

AFE5809ZCF Datasheet(PDF) 49 Page - Texas Instruments

AFE5809ZCF Datasheet(HTML) 49 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90

Datasheet Download

Link URL