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AM3359 Datasheet(PDF) 1 Page - Texas Instruments |
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AM3359 Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 236 page  AM3359, AM3358, AM3357 AM3356, AM3354, AM3352 www.ti.com SPRS717F – OCTOBER 2011 – REVISED APRIL 2013 Sitara™ AM335x ARM® Cortex™-A8 Microprocessors (MPUs) Check for Samples: AM3359, AM3358 1 Device Summary 1.1 Features 1234567 – 32KB of L1 Data Cache with Single Error- • Highlights Detection (parity) – Up to 1-GHz Sitara™ ARM® Cortex™-A8 – 256KB of L2 Cache with Error Correcting 32 ‑‑Bit RISC Microprocessor Code (ECC) • NEON™ SIMD Coprocessor – 176KB of On-Chip Boot ROM • 32KB of L1 Instruction and 32KB Data – 64KB of Dedicated RAM Cache with Single-Error Detection (parity) – Emulation and Debug • 256KB of L2 Cache with Error Correcting Code (ECC) • JTAG – mDDR(LPDDR), DDR2, DDR3, DDR3L – Interrupt Controller (up to 128 interrupt Support requests) – General-Purpose Memory Support (NAND, • On-Chip Memory (Shared L3 RAM) NOR, SRAM) Supporting Up to 16-bit ECC – 64 KB of General-Purpose On-Chip Memory – SGX530 3D Graphics Engine Controller (OCMC) RAM – LCD and Touchscreen Controller – Accessible to all Masters – Programmable Real-Time Unit and Industrial – Supports Retention for Fast Wake-Up Communication Subsystem (PRU-ICSS) • External Memory Interfaces (EMIF) – Real-Time Clock (RTC) – mDDR(LPDDR), DDR2, DDR3, DDR3L – Up to Two USB 2.0 High-Speed OTG Ports Controller: with Integrated PHY • mDDR: 200-MHz Clock (400-MHz Data – 10, 100, 1000 Ethernet Switch Supporting Up Rate) to Two Ports • DDR2: 266-MHz Clock (532-MHz Data – Serial Interfaces Including: Rate) • Two Controller Area Network Ports (CAN) • DDR3: 400-MHz Clock (800-MHz Data Rate) • Six UARTs, Two McASPs, Two McSPI, and Three I2C Ports • DDR3L: 400-MHz Clock (800-MHz Data Rate) – 12-Bit Successive Approximation Register (SAR) ADC • 16-Bit Data Bus – Up to Three 32-Bit Enhanced Capture • 1 GB of Total Addressable Space Modules (eCAP) • Supports One x16 or Two x8 Memory – Up to Three Enhanced High-Resolution PWM Device Configurations Modules (eHRPWM) – General-Purpose Memory Controller (GPMC) – Crypto Hardware Accelerators (AES, SHA, • Flexible 8-Bit and 16-Bit Asynchronous PKA, RNG) Memory Interface with Up to seven Chip Selects (NAND, NOR, Muxed-NOR, SRAM) • MPU Subsystem • Uses BCH Code to Support 4-Bit, 8-Bit, or 16-Bit ECC – Up to 1-GHz ARM® Cortex™-A8 32-Bit RISC Microprocessor • Uses Hamming Code to Support 1-Bit ECC – NEON™ SIMD Coprocessor – Error Locator Module (ELM) – 32KB of L1 Instruction Cache with Single- Error Detection (parity) • Used in Conjunction with the GPMC to 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 Sitara, SmartReflex, DSP/BIOS, XDS are trademarks of Texas Instruments. 3 Cortex, NEON are trademarks of ARM Ltd or its subsidiaries. 4 ARM is a registered trademark of ARM Ltd or its subsidiaries. 5 EtherCAT is a registered trademark of EtherCAT Technology Group. 6 POWERVR SGX is a trademark of Imagination Technologies Limited. 7 All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to Copyright © 2011–2013, Texas Instruments Incorporated specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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