PIC16LF1824 datasheet(208/440 Pages) MICROCHIP

208 / 440 page

PIC16(L)F1847

DS40001453D-page 208

Preliminary

 2011-2013 Microchip Technology Inc.

24.3

PWM Overview

Pulse-Width Modulation (PWM) is a scheme that

provides power to a load by switching quickly between

fully on and fully off states. The PWM signal resembles

a square wave where the high portion of the signal is

considered the on state and the low portion of the signal

is considered the off state. The high portion, also known

as the pulse width, can vary in time and is defined in

steps. A larger number of steps applied, which

lengthens the pulse width, also supplies more power to

the load. Lowering the number of steps applied, which

shortens the pulse width, supplies less power. The

PWM period is defined as the duration of one complete

cycle or the total amount of on and off time combined.

PWM resolution defines the maximum number of steps

that can be present in a single PWM period. A higher

resolution allows for more precise control of the pulse

width time and in turn the power that is applied to the

load.

The term duty cycle describes the proportion of the on

time to the off time and is expressed in percentages,

where 0% is fully off and 100% is fully on. A lower duty

cycle corresponds to less power applied and a higher

duty cycle corresponds to more power applied.

Figure 24-3 shows a typical waveform of the PWM

signal.

24.3.1

STANDARD PWM OPERATION

The standard PWM function described in this section is

available and identical for CCP modules ECCP1,

ECCP2, CCP3 and CCP4.

The standard PWM mode generates a Pulse-Width

Modulation (PWM) signal on the CCPx pin with up to 10

bits of resolution. The period, duty cycle, and resolution

are controlled by the following registers:

•PRx registers

•TxCON registers

• CCPRxL registers

• CCPxCON registers

Figure 24-4 shows a simplified block diagram of PWM

operation.

FIGURE 24-3:

CCP PWM OUTPUT SIGNAL

FIGURE 24-4:

SIMPLIFIED PWM BLOCK

DIAGRAM

Note 1: The corresponding TRIS bit must be

cleared to enable the PWM output on the

CCPx pin.

2: Clearing the CCPxCON register will

relinquish control of the CCPx pin.

Period

Pulse Width

TMRx = 0

TMRx = CCPRxH:CCPxCON<5:4>

TMRx = PRx

CCPRxL

CCPRxH(2) (Slave)

Comparator

TMRx

PRx

(1)

Duty Cycle Registers

CCPxCON<5:4>

Clear Timer,

toggle CCPx pin and

latch duty cycle

Note 1:

The 8-bit timer TMRx register is concatenated

with the 2-bit internal system clock (FOSC), or

two bits of the prescaler, to create the 10-bit

time base.

In PWM mode, CCPRxH is a read-only register.

TRIS

CCPx

Comparator

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