LM27403 datasheet(16/49 Pages) TI

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VIN

8.7 A

1.8 A

1.15V

UVLO/EN

UVLO

Comparator

RUV1

RUV2

LM27403

0.985V

VIN

VOUT

VDD

VIN

VDD

startup time

VIN = 12 V

VOUT = 1.2 V

IOUT = 0 A

FSW = 300 kHz

LM27403

SNVS896 A – AUGUST 2013 – REVISED SEPTEMBER 2013

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Figure 26. Typical Startup Waveforms of VDD and VOUT with Controlled Ramp Rates

PRECISION ENABLE: UVLO/EN

The UVLO/EN pin represents a precision analog enable function for user-defined UVLO power-on input voltage

levels and to toggle the output on and off. The UVLO/EN pin is essentially a comparator-based input referenced

to a flat bandgap voltage with a fixed hysteresis of 165 mV.

The UVLO/EN pin has an internal pullup current of 1.8 µA, as shown in Figure 27. There is also a low IQ

shutdown mode when UVLO/EN is effectively pulled below a base-emitter voltage drop (approximately 0.7 V at

room temperature). This mode shuts down the bias currents of the LM27403, but the UVLO/EN pullup current

source is still available. If UVLO/EN is pulled below this hard shutdown threshold, the internal LDO regulator

powers off and the VDD rail collapses.

Figure 27. Precision UVLO/Enable Circuit with Hysteretic Comparator and Pullup Current Sources

When the precision enable threshold of 1.15 V is exceeded, the UVLO/EN pullup current source increases from

1.8 µA to 10.5 µA (that is, an 8.7-µA hysteresis current). Use this feature to create a customizable UVLO

hysteresis (above the standard 165-mV fixed voltage hysteresis) based on the resistor divider from VIN to turn on

and off the LM27403 at the required input voltage levels. Also, use a capacitor from the UVLO/EN pin to GND to

implement a fixed time delay in power systems with timed sequencing requirements.

Figure 28 shows an example using the circuit in Figure 24 where the input voltage is ramping from 0 V to 10 V in

100 ms. Here, the UVLO resistors, RUV1 and RUV2, are respectively set to 47.5 kΩ and 10 kΩ. Given these

resistances, the typical input UVLO turn-on and turn-off levels are 6.5 V and 5.2 V, respectively. The UVLO/EN

pin voltage steps at the rising and falling thresholds are defined by the UVLO/EN pin current hysteresis.

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