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LM27403 Datasheet(PDF) 21 Page - Texas Instruments

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Part # LM27403
Description  Synchronous Buck Controller with Temperature-Compensated, Inductor-DCR-Based Overcurrent Protection and Programmable Thermal Shutdown
PDF  49 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LM27403 Datasheet(HTML) 21 Page - Texas Instruments

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17
16
15
24
23
HG
SW
LG
GND
CS±
CS+
VIN
VOUT
GND
LM27403
L
RS
CS
RISET
RCS
CCS
Rdcr
QT
13
9
10
D±
D+
Cd
ICS(T)
12
VIN
+
±
CL
Comparator
+
-
+
L
dcr
O CP
ISET
CS
i
R
I
2
R
I
'
§
·

¨
¸
©
¹
VIN
L
RS
CS
Rdcr
VOUT
GND
To Load
VIN
VOUT
GND
L
RISNS
To Load
LM27403
www.ti.com
SNVS896 A – AUGUST 2013 – REVISED SEPTEMBER 2013
Figure 31. Current Sensing using Inductor DCR
Figure 32. Current Sensing using Shunt Resistor
The current limit circuit arrangement is portrayed in Figure 33. The current limit setpoint is set by a single
external resistor, RISET, connected from the CS– pin to the output voltage terminal. The current sourced from
CS– in combination with this series resistance sets the reference voltage to the current limit comparator, as
governed by Equation 8.
where
•
ICS is the CS– pin current, 9.9 µA typically at 25°C
•
IOCP is the dc overcurrent protection setpoint, and
•
ΔiL is the peak-to-peak inductor ripple current.
(8)
Inductor DCR temperature compensation is automatically provided using the remote-diode sensed temperature.
The temperature coefficient (TC) of the inductor winding resistance is typically 3720 ppm/°C. The current-limit
setpoint is maintained essentially constant over temperature by the slope of CS– pin current over temperature.
An increase in sensed DCR voltage associated with an increase of inductor winding temperature is matched by a
concomitant increase in current limit comparator reference voltage. The inductor temperature is measured by
placing an external diode-connected 2N3904 discrete NPN transistor, designated QT in Figure 33, in close
proximity to the inductor (see the TEMPERATURE SENSING: D+ and D– section for more details).
Figure 33. Current-Limit Setpoint Defined by Current Source ICS and Resistor RISET
Copyright © 2013, Texas Instruments Incorporated
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