LM27403 datasheet(27/49 Pages) TI

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LM27403

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SNVS896 A – AUGUST 2013 – REVISED SEPTEMBER 2013

To prevent momentary glitches to the PGOOD pin, a 20-µs deglitch filter is built into the LM27403 to prevent

multiple triggerings of the flag. Note that the primary objective of PGOOD is to signal to the system that the soft-

start period has expired and the output voltage is in regulation for loads within the rated limit. This can be used

for sequencing downstream regulators, an example of which is shown schematically in Figure 43.

During soft-start operation, the PGOOD flag is effectively a logic AND of two signals:

1. The internal soft-start counter (signals the internal soft-start-done flag when the count reaches 128).

2. The UVT comparator output. Note that the UVT comparator monitors SS/TRACK voltage until the first PWM

pulse, and then monitors the FB voltage.

The reason for multiplexing the UVT comparator is to support prebias loads and tracking. The PGOOD voltage

waveform is shown in Figure 34 with a 100-k

Ω pullup resistor to VDD. As described previously, VDD disappears

when UVLO/EN is pulled lower than an effective diode drop (~0.7 V). This does not represent a system-level

issue because PGOOD is already pulled low in that scenario.

GATE DRIVERS: LG and HG

The LM27403 gate driver impedances are low enough to perform effectively in high output current applications

where large die-size or paralleled MOSFETs with correspondingly large gate charge, QG, are used. Measured at

VVDD = 4.5 V, the LM27403's low-side driver has a low impedance pull-down path of 0.9 Ω to minimize the effect

of dv/dt induced turn-on, particularly with low gate-threshold voltage MOSFETs. Similarly, the high-side driver

has 1.5-

Ω and 1.0-Ω pull-up and pull-down impedances, respectively, for faster switching transition times, lower

switching loss, and greater efficiency.

Furthermore, there is a proprietary adaptive deadtime control on both switching edges to prevent shoot-through

and cross-conduction, minimize body diode conduction time, and reduce body diode reverse recovery related

losses. The LM27403 is fully compatible with discrete and Power Block NexFET™ MOSFETs from TI.

SINK AND SOURCE CAPABILITY

Even though an LM27403-based dc/dc regulator is capable of sinking and sourcing current (as it operates in

CCM), the inductor DCR-based overcurrent protection operates only with positive currents. Negative currents are

detected through the low-side MOSFET only when the device is in an overvoltage condition (refer to Zero Cross

and NEGATIVE CURRENT LIMIT sections). Note that prebias startup still operates normally (refer to PREBIAS

STARTUP section).

FAULT CONDITIONS

Overcurrent, overtemperature, output undervoltage and overvoltage protection features are included in the

LM27403.

THERMAL SHUTDOWN

The LM27403 includes an internal junction temperature monitor. If the temperature exceeds 150°C (typ), thermal

shutdown occurs. When entering thermal shutdown, the device:

1. turns off the low-side and high-side MOSFETs;

2. flushes the external soft-start capacitor;

3. initiates a soft-start sequence when the die temperature decreases by the OTP hysteresis, 20°C (typ).

This is a non-latching protection, and, as such, the device will cycle into and out of thermal shutdown if the fault

persists.

CURRENT LIMIT AND SHORT CIRCUIT OPERATION (POSITIVE OVERCURRENT)

When detecting a current-limit (CL) event, one of the following actions occur:

1. Light CL: When a current limit event is detected, the high-side on-pulse is immediately terminated (HG off,

LG on) and the system continues regulating on the next system clock event;

2. Heavy CL: If five current limit events occur in any 32 clock cycles, the pulse is terminated (HG off, LG off)

and hiccup mode is entered.

The following actions occur in hiccup mode:

1. HG off, LG off;

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