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BF516 Datasheet(PDF) 28 Page - Analog Devices |
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BF516 Datasheet(HTML) 28 Page - Analog Devices |
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28 / 68 page ![]() Rev. B | Page 28 of 68 | January 2011 ADSP-BF512/BF512F, BF514/BF514F, BF516/BF516F, BF518/BF518F Flash Reset Timing Driving the RESET pin low resets the Flash device. Driving the RESET pin high puts the device in normal operating mode. The SO pin is in high impedance state while the device is in reset. A successful reset will reset the status register to its power-up state. See Table 25 for default power-up modes. A device reset during an active Program or Erase operation aborts the operation and data of the targeted address range may be corrupted or lost due to the aborted erase or program operation. The device exits AAI Programming Mode in progress and places the SO pin in high impedance state. Figure 8. Power-Up Reset Timing RESET tRST_IN_PWR CLKIN V DD_SUPPLIES Table 25. RESET Timing Parameter Min Max Unit Timing Requirements tRECR Reset Recovery from Read 100 ns tRECP Reset Recovery from Program 10 μs fRECE Reset Recovery from Erase 1ms Figure 9. Flash Reset Timing SCK RST tRECR tRECP tRECE CE |
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