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AT90USB646 Datasheet(PDF) 137 Page - ATMEL Corporation |
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AT90USB646 Datasheet(HTML) 137 Page - ATMEL Corporation |
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137 / 456 page ![]() 137 7593L–AVR–09/12 AT90USB64/128 When the OCnA, OCnB or OCnC is connected to the pin, the function of the COMnx1:0 bits is dependent of the WGMn3:0 bits setting. Table 15-1 shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to a normal or a CTC mode (non-PWM). Table 15-2 shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the fast PWM mode. Note: A special case occurs when OCRnA/OCRnB/OCRnC equals TOP and COMnA1/COMnB1/COMnC1 is set. In this case the compare match is ignored, but the set or clear is done at TOP. See “Fast PWM mode” on page 104. for more details. Table 15-3 on page 138 shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the phase correct and frequency correct PWM mode. Table 15-1. Compare Output mode, non-PWM. COMnA1/COMnB1/ COMnC1 COMnA0/COMnB0/ COMnC0 Description 00 Normal port operation, OCnA/OCnB/OCnC disconnected. 0 1 Toggle OCnA/OCnB/OCnC on compare match. 10 Clear OCnA/OCnB/OCnC on compare match (set output to low level). 11 Set OCnA/OCnB/OCnC on compare match (set output to high level). Table 15-2. Compare Output mode, fast PWM. COMnA1/COMnB1/ COMnC0 COMnA0/COMnB0/ COMnC0 Description 00 Normal port operation, OCnA/OCnB/OCnC disconnected. 01 WGM13:0 = 14 or 15: Toggle OC1A on Compare Match, OC1B and OC1C disconnected (normal port operation). For all other WGM1 settings, normal port operation, OC1A/OC1B/OC1C disconnected. 10 Clear OCnA/OCnB/OCnC on compare match, set OCnA/OCnB/OCnC at TOP 11 Set OCnA/OCnB/OCnC on compare match, clear OCnA/OCnB/OCnC at TOP |
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