AM79C974 datasheet(146/153 Pages) AMD

Part #	AM79C974

Description	PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems

PDF	153 Pages

Scroll/Zoom	100%

Manufacturer	AMD [Advanced Micro Devices]

Direct Link	http://www.amd.com

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AMD

A M E N D M E N T

Am79C974

Master Abort

The Am79C974 controller will terminate its cycle with a

Master Abort sequence if

DEVSEL is not asserted within

4 clocks after

FRAME is asserted. Master Abort is

treated as a fatal error by the Am79C974 controller. For

the Ethernet, the Am79C974 controller will reset all CSR

and BCR locations to their H_RESET values. Any

on-going network activity will be stopped immediately.

The PCI configuration registers will not be cleared. For

SCSI, when the master aborts,

INTA will not be as-

serted, but the ABORT bit (bit 2 of the DMA status regis-

ter at offset 54h), is set. For either Ethernet or SCSI a

master abort causes RMABORT (bit 13) of the status

be set.

18681A/1-20

FRAME

CLK

IRDY

TRDY

DEVSEL

REQ

GNT

12345678

ADDR

DATA

0000

0111

PAR

DEVSEL is sampled by the Am79C974 controller.

Figure 16. Master Abort

AM79C974 Datasheet(PDF) 146 Page - Advanced Micro Devices