AM79C974 datasheet(150/153 Pages) AMD

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AMD

A M E N D M E N T

Am79C974

DMA Scatter-Gather Mechanism

The Am79C974 contains a scatter-gather translation

mechanism which facilitates faster data transfers. This

feature uses a Memory Descriptor List (a list of contigu-

ous physical memory addresses) which is stored in sys-

tem memory. Use of the Memory Descriptor List allows

a single SCSI transfer to be read from (or written to) non-

contiguous physical memory locations. This mecha-

nism avoids copying the transfer data and MDL list,

which was previously required for conventional DMA

operations.

Memory Descriptor List (MDL)

The MDL is a non-terminated (no End Of File marker)

list of 32-bit page frame addresses, which is always

aligned on a Double Word boundary. The format is

shown below:

12 11

Page Frame Address

Ignored

DMA Scatter-Gather Operation

(4k aligned elements)

The

scatter-gather

mechanism

described

below

assumes 4k page alignment and size for all MDL entries

except the first and last entry. This feature is enabled by

setting the MDL bit in the DMA Command register (Bit 4,

Address (B)+40h).

1. a) Prepare the Memory Descriptor List (MDL)

through software and store it in system

memory.

b) Load the address of the starting entry in the

Memory Descriptor List (MDL) into the Start

Memory Descriptor List Address (SMDLA)

the Working MDL Address Counter (WMAC).

c) Program the Starting Transfer Count (STC)

bytes). Also program the Starting Physical

Address (SPA) register (bits 11:0) with the

starting offset of the first entry.

Note: The value in the SMDLA register must be double

word aligned. Therefore, read/write transactions will al-

ways begin on a double word boundary.

18681A/1-31

SMDLA

WMAC

MDL

Page Frame Address #1

Page Frame Address #2

Page Frame Address #3

Page Frame Address #4

Ignored

Page Frame Address #n

Ignored

AM79C974 Datasheet(PDF) 150 Page - Advanced Micro Devices

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