AM79C974 datasheet(148/153 Pages) AMD

148 / 153 page

AMD

A M E N D M E N T

Am79C974

have yet to be transferred from the SCSI peripheral de-

vice and must start a new transfer operation to get the

rest of the data. (CTCREG consists of three bytes lo-

cated at ((B)+00h, (B)+04h, and (B)+38h.)

Funneling Logic

Figure 26 shows the internal DMA logic interface with

the SCSI block. The DMA FIFO interfaces to the Funnel

Logic block via a 32-bit data bus, and the funnel logic

properly reduces this stream of data to a 16-bit stream to

properly interface with the SCSI FIFO.

18681A/1-30

Figure 26. DMA FIFO to SCSI FIFO Interface

SCSI DMA Programming Sequence

The following section outlines the procedure for execut-

ing SCSI DMA operations:

1. Issue IDLE command to the DMA Engine

2. Configure the SCSI block registers (e.g. synchro-

nous operation, offset values, etc.)

3. Program the DMA registers to set up address and

transfer count

4. Issue a transfer command to the SCSI command

registers

5. Issue the START command to the DMA engine

6. At the end of the DMA transaction, issue the IDLE

command to the DMA engine

MDL Based DMA Programming

The following section outlines the procedure for execut-

ing MDL based DMA operation:

1. Set up the MDL list

2. Use the programming sequence defined earlier for

initiating a SCSI DMA transfer

AM79C974 Datasheet(PDF) 148 Page - Advanced Micro Devices