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TPS61301 Datasheet(PDF) 7 Page - Texas Instruments |
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TPS61301 Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 77 page ![]() TPS61300 TPS61301 TPS61305, TPS61305A www.ti.com SLVS957D – JUNE 2009 – REVISED OCTOBER 2012 I 2C INTERFACE TIMING CHARACTERISTICS(1) (continued) PARAMETER TEST CONDITIONS MIN MAX UNIT Standard mode 20 + 0.1 CB 1000 ns Fast mode 20 + 0.1 CB 300 ns tRCL Rise Time of SCL Signal High-speed mode, CB – 100 pF max 10 40 ns High-speed mode, CB – 400 pF max 20 80 ns Standard mode 20 + 0.1 CB 1000 ns Rise Time of SCL Signal After a Fast mode 20 + 0.1 CB 300 ns tRCL1 Repeated START Condition and After High-speed mode, CB – 100 pF max 10 80 ns an Acknowledge BIT High-speed mode, CB – 400 pF max 20 160 ns Standard mode 20 + 0.1 CB 300 ns Fast mode 20 + 0.1 CB 300 ns tFCL Fall Time of SCL Signal High-speed mode, CB – 100 pF max 10 40 ns High-speed mode, CB – 400 pF max 20 80 ns Standard mode 20 + 0.1 CB 1000 ns Fast mode 20 + 0.1 CB 300 ns tRDA Rise Time of SDA Signal High-speed mode, CB – 100 pF max 10 80 ns High-speed mode, CB – 400 pF max 20 160 ns Standard mode 20 + 0.1 CB 300 ns Fast mode 20 + 0.1 CB 300 ns tFDA Fall Time of SDA Signal High-speed mode, CB – 100 pF max 10 80 ns High-speed mode, CB – 400 pF max 20 160 ns Standard mode 4 μs tSU, tSTO Setup Time for STOP Condition Fast mode 600 ns High-speed mode 160 ns CB Capacitive Load for SDA and SCL 400 pF Copyright © 2009–2012, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: TPS61300 TPS61301 TPS61305 TPS61305A |
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