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TSL2583 Datasheet(PDF) 20 Page - ams AG |
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TSL2583 Datasheet(HTML) 20 Page - ams AG |
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20 / 33 page ![]() TSL2581, TSL2583 LIGHT-TO-DIGITAL CONVERTER TAOS134A − JULY 2012 19 The LUMENOLOGY r Company r r Copyright E 2012, TAOS Inc. www.taosinc.com APPLICATION INFORMATION: SOFTWARE System Considerations There are three system design considerations to take into account when using this device: D The initial Channel 0 and Channel 1 ADC values (14h~17h) after ADC_EN is asserted should be discarded because the first ADC values are affected by transients associated with the power up of the analog circuitry. D It is recommended that the ADC_EN be disabled before changing the analog gain (GAIN) in the Analog register (07h) because the change will affect the integration in progress, yielding an indeterminate result. D The integration time (ITIME) in the Timing register (01h) can be changed at any time; however, the change will take effect only upon completion of the current ALS cycle. Regarding the first design consideration, there are several ways that the initial ADC values can be discarded. One option is to use the interrupt persistence (PERSIST) in the Interrupt Control register (02h) equal to 2 (0010b), such that an interrupt is generated after the second ADC cycle when the values are valid. To ensure an interrupt, the interrupt high and low threshold registers (03h~06h) can both be set to 0, which is the default value. Once the interrupt occurs, the interrupt thresholds and PERSIST can be modified as desired. To ensure the shortest time in the initial ADC cycle, another option is to set ITIME to the minimum, assert ADC_EN, and then change ITIME to the preferred integration time. Clear the first interrupt produced by the minimum integration time cycle so subsequent interrupts are the result of the modified integration time. For example code that satisfies the system considerations listed above, see TAOS Designer’s Notebook Number 42: TSL258x: Accurate ADC Readings after Enable. |
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