AT25DL161 datasheet(4/58 Pages) ETC2

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AT25DL161 [DATASHEET]

8795F–DFLASH–1/2013

HOLD

Hold: The HOLD pin is used to temporarily pause serial communication without

deselecting or resetting the device. While the HOLD pin is asserted, transitions

on the SCK pin and data on the SI pin will be ignored and the SO pin will be in a

high-impedance state.

The CS pin must be asserted and the SCK pin must be in the low state in order

for a Hold condition to start. A Hold condition pauses serial communication only

and does not have an affect on internally self-timed operations, such as a

program or erase cycle. See “Hold” on page 46 for additional details on the Hold

operation.

The HOLD pin is internally pulled-high and may be left floating if the Hold

function will not be used. However, it is recommended that the HOLD pin also

be externally connected to the VCC whenever possible.

Low

Input

VCC

Device Power Supply: The VCC pin is used to supply the source voltage to the

device.

Operations at invalid VCC voltages may produce spurious results and should not

be attempted.

—

Power

GND

Ground: The ground reference for the power supply. GND should be

connected to the system ground.

—

Power

Figure 2-1. 8-lead SOIC

Figure 2-2. 8-pad UDFN

Figure 2-3. 8-ball dBGA (WLSCP)

Table 2-1.

Pin Descriptions (Continued)

Symbol

Name and Function

Asserted

State

Type

SO (SOI)

GND

VCC

HOLD

SCK

SI (SIO)

Top View

SO (SOI)

GND

VCC

HOLD

SCK

SI (SIO)

Top View

through back of Die

VCC

HOLD

SCK

SI (SIO)

SO (SOI)

GND

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