DS80C390 datasheet(43/58 Pages) DALLAS

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DS80C390

43 of 58

110199

MULTIPLEXED 9 CYCLE DATA MEMORY

CE0

WRITE

ELECTRICAL CHARACTERISTICS (Non-multiplexed address/data bus)

40 MHz

VARIABLE CLOCK

PARAMETER

SYMBOL MIN MAX

MIN

MAX

UNITS

Oscillator Freq.

(Ext. Osc)

1 / tCLCL

MHz

(Ext. Crystal)

PSEN

Pulse Width

tPLPH

0.5 tMCS - 5

PSEN

Low to Valid Instruction In

tPLIV

0.5 tMCS - 20

Input Instruction Hold after PSEN

tPXIX

Input Instruction Float after PSEN

tPXIZ

See MOVX

characteristics

Port 1 Address, Port 4 CE to

Valid Instruction In

tAVIV1

0.75 tMCS - 20

Port 2, 4 Address to Valid

Instruction In

tAVIV2

0.875 tMCS - 25

NOTES FOR AC ELECTRICAL CHARACTERISTICS:

1. All parameters apply to both commercial and industrial temperature operation unless otherwise noted.

2. The value tMCS is a function of the machine cycle clock in terms of the processor’s input clock

frequency. These relationships are described in the “Stretch Value Timing” table.

3. All signals characterized with load capacitance of 80 pF except Port 0, ALE, PSEN , RD and WR

with 100 pF.

4. Interfacing to memory devices with float times (turn off times) over 25 ns may cause bus contention.

This will not damage the parts, but will cause an increase in operating current.

5. Specifications assume a 50% duty cycle for the oscillator. Port 2 timing will change in relation to

duty cycle variation.

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