Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

TAS5729MD Datasheet(PDF) 20 Page - Texas Instruments

Click here to check the latest version.
Part # TAS5729MD
Description  12W I짼S Input Class-D Amplifier with Digital Audio Processor and DirectPath??HP / Line Driver
PDF  59 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TAS5729MD Datasheet(HTML) 20 Page - Texas Instruments

Back Button TAS5729MD Datasheet HTML 16Page - Texas Instruments TAS5729MD Datasheet HTML 17Page - Texas Instruments TAS5729MD Datasheet HTML 18Page - Texas Instruments TAS5729MD Datasheet HTML 19Page - Texas Instruments TAS5729MD Datasheet HTML 20Page - Texas Instruments TAS5729MD Datasheet HTML 21Page - Texas Instruments TAS5729MD Datasheet HTML 22Page - Texas Instruments TAS5729MD Datasheet HTML 23Page - Texas Instruments TAS5729MD Datasheet HTML 24Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 20 / 59 page
background image
SCLK
16Clks
LRCLK
LeftChannel
16-BitMode
1
1
15
15
14
14
MSB
LSB
16Clks
RightChannel
2-ChannelI S(PhilipsFormat)StereoInput
2
T0266-01
3
3
2
2
5
5
4
4
9
9
8
8
0
13
13
10
10
11
11
12
12
SCLK
MSB
LSB
23
22
SCLK
24Clks
LRCLK
LeftChannel
24-BitMode
1
19
18
20-BitMode
16-BitMode
15
14
MSB
LSB
24Clks
RightChannel
2-ChannelI S(PhilipsFormat)StereoInput/Output(24-Bit TransferWordSize)
2
T0092-01
3
2
5
4
9
8
17
16
1
0
0
4
5
13
12
1
0
9
8
23
22
SCLK
1
19
18
15
14
MSB
LSB
3
2
5
4
9
8
17
16
1
0
4
5
13
12
1
0
9
8
TAS5729MD
SLOS836A – MAY 2013 – REVISED JUNE 2013
www.ti.com
NOTE: All data presented in 2s-complement form with msB first.
Figure 32. I²S 48-fS Format
NOTE: All data presented in 2s-complement form with msB first.
Figure 33. I²S 32-fS Format
Left-Justified
Left-justified (LJ) timing uses LRCLK to define when the data being transmitted is for the left channel and when it
is for the right channel. LRCLK is high for the left channel and low for the right channel. A bit clock running at 32,
48, or 64 × fS is used to clock in the data. The first bit of data appears on the data lines at the same time LRCLK
toggles. The data is written msB-first and is valid on the rising edge of the bit clock. The DAP masks unused
trailing data-bit positions.
20
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: TAS5729MD



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com