TAS5729MD datasheet(44/59 Pages) TI1

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TAS5729MD

SLOS836A – MAY 2013 – REVISED JUNE 2013

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OSCILLATOR TRIM REGISTER (0x1B)

The TAS5729MD PWM processor contains an internal oscillator to support autodetect of I²S clock rates. This

reduces system cost because an external reference is not required. Currently, TI recommends a reference

resistor value of 18.2 k

Ω (1%). This should be connected between OSC_RES and DVSSO.

Writing 0x00 to register 0x1B enables the trim that was programmed at the factory.

Note that trim must always be run following reset of the device.

Table 17. Oscillator Trim Register (0x1B)

FUNCTION

–

Reserved(1)

–

Oscillator trim not done (read-only)(1)

–

Oscillator trim done (read only)

–

Reserved(1)

–

Select factory trim (Write a 0 to select factory trim; default is 1.)

–

Factory trim disabled(1)

–

Reserved(1)

(1)

Default values are in bold.

BKND_ERR REGISTER (0x1C)

When a back-end error signal is received from the internal power stage, the power stage is reset, stopping all

PWM activity. Subsequently, the modulator waits approximately for the time listed in Table 18 before attempting

to re-start the power stage.

Table 18. BKND_ERR Register (0x1C)

FUNCTION

–

Reserved(1)

–

Set back-end reset period to 299 ms

–

Set back-end reset period to 449 ms

–

Set back-end reset period to 598 ms

–

Set back-end reset period to 748 ms

–

Set back-end reset period to 898 ms

–

Set back-end reset period to 1047 ms(1)

–

Set back-end reset period to 1197 ms

–

Set back-end reset period to 1346 ms

–

Set back-end reset period to 1496 ms

–

Set back-end reset period to 1496 ms

(1)

Default values are in bold.

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