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GMS87C1102 Datasheet(PDF) 71 Page - Hynix Semiconductor |
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GMS87C1102 Datasheet(HTML) 71 Page - Hynix Semiconductor |
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71 / 89 page  GMS81C1102 / GMS81C1202 68 Jan. 2002 ver 2.0 22. RESET The reset input is the RESET pin, which is the input to a Schmitt Trigger. A reset in accomplished by holding the RESET pin low for at least 8 oscillator periods, while the oscillator running. After reset, 64ms (at 4 MHz) add with 7 oscillator periods are required to start execution as shown in Figure 22-1 . Internal RAM is not affected by reset. When VDD is turned on, the RAM content is indeterminate. Therefore, this RAM should be initialized before reading or testing it. Initial state of each register is shown as Table 12-3 . Figure 22-1 Timing Diagram after RESET MAIN PROGRAM Oscillator (XIN pin) ? ? FFFE FFFF Stabilization Time tST = 64mS at 4MHz RESET ADDRESS DATA 1 2 3 4 5 6 7 ?? Start ? ? ? FE ? ADL ADH OP BUS BUS RESET Process Step |
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