28F002BC datasheet(31/37 Pages) INTEL

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28F002BC 2-MBIT BOOT BLOCK FLASH MEMORY

PRELIMINARY

Table 9. AC Characteristics: WE#—Controlled Write Operations(1) (Continued)

28F002BC-80

28F002BC-120

Symbol

Parameter

Notes

VCC = 5V ± 10%

100 pF

VCC = 5V ± 10%

100 pF

Units

Min

Max

Min

Max

tWHWL

WE# Pulse Width High

tWHQV1

Duration of Programming Operation

2, 5

µs

tWHQV2

Duration of Erase Operation (Boot)

2, 5, 6

0.3

tWHQV3

Duration of Erase Operation

(Parameter)

2,5

0.3

tWHQV4

Duration of Erase Operation (Main)

2, 5

0.6

tQVVL

VPP Hold from Valid SRD

5, 8

tQVPH

RP# VHH Hold from Valid SRD

6, 8

tPHBR

Boot Block Lock Delay

7, 8

100

NOTES:

1. Read timing characteristics during write and erase operations are the same as during read-only operations. Refer to AC

characteristics during read mode.

2. The on-chip WSM completely automates program/erase operations; program/erase algorithms are now controlled internally

which includes verify and margining operations.

3. Refer to command definition table for valid A

IN.

4. Refer to command definition table for valid D

IN.

5. Program/erase durations are measured to valid SRD data (successful operation, SR.7 = 1).

6. For boot block program/erase, RP# should be held at V

HH until operation completes successfully.

7. Time t

PHBR is required for successful relocking of the boot block.

8. Sampled, but not 100% tested.

28F002BC Datasheet(PDF) 31 Page - Intel Corporation

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