D8088 datasheet(20/30 Pages) INTEL

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D8088 Datasheet(PDF) 20 Page - Intel Corporation

20 / 30 page

8088

WAVEFORMS (Continued)

BUS TIMINGMINIMUM MODE SYSTEM

(Continued)

231456 – 14

NOTES

1 All signals switch between VOH and VOL unless otherwise specified

2 RDY is sampled near the end of T2 T3 Tw to determine if Tw machines states are to be inserted

3 Two INTA cycles run back-to-back The 8088 local ADDRDATA bus is floating during both INTA cycles Control

signals are shown for the second INTA cycle

4 Signals at 8284 are shown for reference only

5 All timing measurements are made at 15V unless otherwise noted

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