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82091AA Datasheet(PDF) 16 Page - Intel Corporation

Part # 82091AA
Description  ADVANCED INTEGRATED PERIPHERAL (AIP)
PDF  204 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

82091AA Datasheet(HTML) 16 Page - Intel Corporation

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82091AA
22 Floppy Disk Controller Interface (Continued)
Signal
Type
Description
Name
FDME1
O
FLOPPY DRIVE MOTOR ENABLE 1 IDLE OR DRIVE SELECT ENABLE
This
signal pin has two functions(1) FDME1
is the motor enable for drive 1 FDME1
DSEN (1)
is directly controlled via the Digital Output Register (DOR) and is a function of the
mapping based on the BOOTSEL bits in the Tape Drive Register (TDR)
The Drive Select Enable (DSEN ) function is only used in a four floppy drive
system (see Appendix A FDC Four Drive Support)
FDS1
O
FLOPPY DRIVE SELECT1 POWERDOWN OR MOTOR DRIVE SELECT 1
This
signal pin has two functions(1) FDS1
is the floppy drive select for drive 1 FDS1
MDS1(1)
is controlled by the select bits in the DOR and is a function of the mapping based
on the BOOTSEL bits in the TDR
The Motor Drive Select 1 (MDS1) function is only used in a four floppy drive system
(see Appendix A FDC Four Drive Support)
FDME0
O
FLOPPY DRIVE MOTOR ENABLE 0 OR MOTOR ENABLE ENABLE
This signal
pin has two functions(1) FDME0
is the motor enable for drive 0 FDME0
is
MEEN (1)
directly controlled via the Digital Output Register (DOR) and is a function of the
mapping based on the BOOTSEL bits in the Tape Drive Register (TDR)
The Motor Enable Enable (MEEN ) function is only used in a four floppy drive
system (see Appendix A FDC Four Drive Support)
FDS0
O
FLOPPY DRIVE SELECT 0 OR MOTOR DRIVE SELECT 0
This signal pin has two
functions(1) FDS0
is the floppy drive select for drive 0 This output is controlled
MDS0(1)
by the drive select bits in the DOR and is a function of the mapping based on
BOOTSEL bits in the TDR
The Motor Drive Select 0 (MDS0) function is only used in a four floppy drive system
(see Appendix A FDC Four Drive Support)
NOTE
1 The function selected for these pins is based on the FDDQTY bit in the FCFG1 Register as shown in the following table
Signal Pin
2 Drive System
4 Drive System
(FDDQTYe0)
(FDDQTYe1)
FDME1
DSEN
FDME1
DSEN
FDS1
MDS1
FDS1
MDS1
FDME0
MEEN
FDME0
MEEN
FDS0
MDS0
FDS0
MDS0
When FDDQTYe1 these signal pins are used to control an external decoder for a four floppy disk
drive system as described in Appendix A FDC Four Drive Support
16



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