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82091AA Datasheet(PDF) 34 Page - Intel Corporation

Part # 82091AA
Description  ADVANCED INTEGRATED PERIPHERAL (AIP)
PDF  204 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

82091AA Datasheet(HTML) 34 Page - Intel Corporation

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82091AA
Bit
Description
7
NOT USED
Always write to 0
6
VOLTAGE SELECT (VSEL)
This bit indicates whether 33V or 5V has been selected for the
operating power supply voltage during hardware configuration A 1 indicates that 33V is selected
and a 0 indicates that 5V is selected This bit is read only and writes have no effect
NOTE
33V operation is available only in the 82091AA
54
CONFIGURATION MODE SELECT (CFGMOD)
These bits indicate the configuration mode for the
82091AA After a hard reset these bits reflect the mode selected by hardware configuration If
configuration register access is not locked out during hardware configuration software can change
the configuration mode by writing to this field For configuration mode details (see Section 42
Hardware Configuration)
Bits 54
Configuration Mode
0 0
Software Motherboard (SWMB)
0 1
Software Add-in (SWAI)
1 0
Extended Hardware (HWE)
1 1
Basic Hardware (HWB)
3
CONFIGURATION ADDRESS SELECT (CFGADS)
This read only bit indicates the address
assignment for the 82091AA configuration registers as selected by hardware configuration
Hardware configuration selects between primary addresses (22h23h and 26Eh26Fh) and
secondary addresses (24h25h and 398h399h) for accessing the 82091AA configuration registers
When CFGADSe0 the primary addresses are selected and when CFGADSe1 the secondary
addresses are selected
2
RESERVED
1
RESERVED
0
CLOCK OFF (CLKOFF)
The CLKOFF bit is used to implement clock circuitry power management
When CLKOFFe0 the main clock circuitry is powered on When CLKOFFe1 the main clock
circuitry is powered off This capability is independent of the 82091AA’s powerdown state Note that
auto powerdown mode and powerdown have no effect over the power state of the clock circuitry
415 AIPCFG2AIP CONFIGURATION 2 REGISTER
Index Address
03h
Default Value
0000 0RRR
Attribute
ReadWrite
Size
8 bits
This register selects the active signal level for IRQ 73
The interrupt signals can be individually programmed
for either active high or active low drive characteristics The active high mode is ISA (non-share) compatible
and has tri-state drive characteristic The active low mode is EISA (sharable) compatible and has an open
collector drive characteristic
34



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