AN2511 datasheet(23/43 Pages) STMICROELECTRONICS

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AN2511

PMBus commands and source code

Doc ID 13286 Rev 2

23/43

PCOR = CONTROL ;

PCDR = CONTROL ;

/*----------------------- Alert Interrupt configuration ---------------------

----------*/

EnableInterrupts;

/* Resets interrupt mask */

MISCR1 = 0x10 ;

/* EI0 on falling edge low level for Alert interrupt */

/*---------------------PMBus communication configuration-------------------*/

while (1)

{

/* I2C configuration: ST7 I2C address 0x30, communication speed 100kHz */

PMBus_Init (SMBs_MISC, SLAVEADD, 0x40, 0x23);

/* Checking if an alert signal is received from slave */

if (SMBus_Mode & SMB_ARA)

{

/* ST7 I2C sends the alert response address to check which slave

alerted */

PMBus_Err = SMBm_ReceiveByte (ALERTRESPONSEADD, Data_Buff);

/* Alerted slave address will be used for any further communication */

PMBus_SlaveAdd = *Data_Buff ;

SMBus_Mode &= (unsigned char) ~SMB_ARA ;

}

Command_Code =

0x01;

/* User should enter the PMBus command code here */

PMBus_CommandWrite (Command_Code);

/* Writes data from Data_Buff */

Command_Code =

0x02;

/* User should enter the PMBus command code here */

/* Read data and store it in Data_Buff */

PMBus_CommandRead (Command_Code);

if (SMB_Err_Status)

{

/* I2C status register read to clear any

errors

SMB_Err_Status = I2CSR2 ;

SMB_Err_Status = 0 ;

}

/* End of while (1) */

}

/* End of main */

3.4

Limitations

The SMBus driver used in this application note is tested only for write word, read word

and write block protocols with PEC disabled.

The SMBus driver doesn't meet the clock low extending feature of SMBus v1.1 due to

the limitation of the I2C peripheral.

In case of PEC, when slave is acting as receiver, the ACK bit is not disabled if the PEC

received from master transmitter is different from slave. It is stored in the user address

as the last byte. It is the responsibility of the user to check the master PEC with the

slave PEC to decide on data validity.

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