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AN3981 Datasheet(PDF) 29 Page - STMicroelectronics |
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AN3981 Datasheet(HTML) 29 Page - STMicroelectronics |
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29 / 54 page ![]() AN3981 STP24DP05 Doc ID 022217 Rev 1 29/54 as an “Error status code” coming out of the SDO pin (see Figure 32), with “0” logic level indicating a faulty channel, whereas a “1” logic level indicates a “good” channel. Figure 32. Error status code The device can enter error detection mode in two ways: 1. setting low the DM pin 2. providing a logic sequence on the and LE pins. 4.6.1 Error detection through the DM pin As shown in Figure 33, the device enters error detection mode when the DM pin is set low. The error detection is performed correctly when the pin is set low for at least 1 µs. When the DM and pins are set high again, the error status code is available at the SDO pin. 24 CLK cycles are necessary to make the device shift out of the complete error status code. Table 4. Detection conditions Detection conditions Detection result IODEC (1) = 0.4·I O (2) 1. IODEC is the detected output current in detection mode. 2. IO is the programmed output current. Open channel or output short to GND detected IODEC = 0.4·IO No error detected VO = 2.6 V Short on LED or short to LED supply voltage VO = 2.4 V No error detected OE R – OE R – OE R – |
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