AN3981 datasheet(30/54 Pages) STMICROELECTRONICS

30 / 54 page

STP24DP05

AN3981

30/54

Doc ID 022217 Rev 1

Figure 33.

Error detection through the DM pin

4.6.2

Error detection through

and LE

The error detection process activated by the logic sequence of

and the LE pin can

be divided into three phases:

Entering detection mode. From “normal mode” the device can enter “error mode”

through a logic key (Figure 34), which is a logic sequence of the

and LE signals

over five CLK cycles. After these five CLK cycles the device is in “error detection mode”

and ready for sampling data on the SDI pin

Error detection. Once the device has entered “error detection mode”, a 24-bit string

should be loaded into the shift register through the SDI pin in order to set the outputs in

accordance with the diagnostic demands (only the outputs that are on are checked by

the error detection process). Therefore, if the user wants to check all the outputs, a

string with all “1” must be sent. After that the outputs are ready for the detection

process, which starts when

is set low. The device drives LEDs in order to

analyze if an open or short condition has occurred. The

must remain low for at

least 1 µs to complete the detection process. As shown in Figure 36, during the

detection process, at least three clock pulses are necessary: two pulses as soon as the

is set low, one clock pulse before ending the detection process. Once the

is set high, the error status code is available at the SDO pin. To download the

complete error string, at least 24 clock pulses are necessary

Resuming normal mode. The device quits detection mode and returns to normal mode

through an exit logic key (Figure 35), a logic sequence over five clock pulses.

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AN3981 Datasheet(PDF) 30 Page - STMicroelectronics