UPD70732 datasheet(32/66 Pages) NEC

32 / 66 page

µPD70732

Table 9-1. Instruction Mnemonics (in alphabetical order) (5/9)

Instruction

Operand (s)

Format

CY OV

Instruction Function

Mnemonic

LDSR

reg2, regID

Loading system register:

Transfers the word data in the reg2-specified register

to the system register specified with the system register

number (regID).

MOV

reg1, reg2

–

Transferring data:

Loads the reg2-specified register with the word data

in of the reg1-specified register.

MOV

imm5, reg2

–

Transferring data:

Sign-extends the 5-bit immediate data to 32 bits, then

loads the reg2-specified register with the extended

immediate data.

MOVBSU

–

Transferring bit strings:

Loads the destination bit string with the source bit

string.

MOVEA

imm16, reg1, reg2

–

Addition:

Sign-extends the 16-bit immediate data to 32 bits,

adds it with the word data in the reg1-specified register,

then stores the addition result into reg2.

MOVHI

imm16, reg1, reg2

–

Addition:

Appends 16-bit zeros below the 16-bit immediate data

to form a 32-bit word data, then adds it with the word

data in the reg1-specified register, and stores the

result into the reg2-specified register.

MUL

reg1, reg2

–

Signed multiplication:

Signed-multiplies the word data in the reg2-specified

(double-word) result into two 32-bit data, and stores

the higher 32 bits into r30 and the lower 32 bits into

the reg2-specified register.

MULF.S

reg1, reg2

VII

Floating-point multiplication:

Multiplies the single-precision floating-point data in

the reg2-specified register by that for reg1, then stores

the result into the reg2-specified register while changing

flags according to the result.

MULU

reg1, reg2

–

Unsigned multiplication:

Multiplies the word data in the reg2-specified register

by that for reg1 while handling these data as unsigned

data, then separates the 64-bit (double-word) result

into two 32-bit data, and stores the higher 32 bits into

r30 and the lower 32 bits into the reg2-specified

NOP

–

III

–

No operation:

Makes no changes or operations while spending one

instruction cycle.

NOT

reg1, reg2

–

Logical NOT:

Obtains the 1’s complement (logical NOT) of the

content of the reg1-specified register, then stores the

result into the reg2-specified register.

UPD70732 Datasheet(PDF) 32 Page - NEC

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